ADSP-TS202S_06 AD [Analog Devices], ADSP-TS202S_06 Datasheet - Page 21

• Manufacturer Part Number: ADSP-TS202S_06
• Description: TigerSHARC Embedded Processor
• Manufacturer: AD [Analog Devices]

ADSP-TS202S—SPECIFICATIONS
Note that component specifications are subject to change with-
out notice. For information on link port electrical
characteristics, see
(LVDS) Electrical Characteristics, and Timing on Page
OPERATING CONDITIONS
1
2
3
4
5
6
Parameter
V
V
V
V
T
V
V
V
I
I
I
I
V
SCLK_V
Specifications vary for different grades (for example, SABP-060, SABP-050, SWBP-050). For more information on part grades, see
V
Values represent dc case. During transitions, the inputs may overshoot or undershoot to the voltage shown in
V
Applies to input and bidirectional pins.
For details on internal and external power calculation issues, including other operating conditions, see the EE-170, Estimating Power for the ADSP-TS202S on the Analog Devices
DD
DD_A
DD_IO
DD_DRAM
CASE
CAS, SDCKE, SDWE, TCK, FLAG3–0, DS2–0, ENEDREG.
to 100% duty cycle.
website.
DD
DD_A
DD_IO
DD_DRAM
IH1
IH2
IL
REF
IH1
IH2
specification applies to input and bidirectional pins: SCLKRAT2–0, SCLK, ADDR31–0, DATA63–0, RD, WRL, WRH, ACK, BRST, BR7–0, BOFF, HBR, HBG, MSSD3–0, RAS,
specification applies to input and bidirectional pins: TDI, TMS, TRST, CIMP1–0, ID2–0, LxBCMPI, LxACKI, POR_IN, RST_IN, IRQ3–0, CPA, DPA, DMAR3–0.
REF
Description
Internal Supply Voltage
Analog Supply Voltage
I/O Supply Voltage
Internal DRAM Supply Voltage
Case Operating Temperature
High Level Input Voltage
High Level Input Voltage
Low Level Input Voltage
V
V
V
V
Activity
Voltage Reference
Voltage Reference
DD
DD_A
DD_IO
DD_DRAM
Supply Current, Typical Activity
Link Port Low Voltage, Differential-Signal
Supply Current, Typical Activity
Supply Current, Typical Activity
6
Supply Current, Typical
3, 5
2, 3
3, 4
6
Rev. C | Page 21 of 48 | December 2006
6
30.
Test Conditions
@ CCLK = 500 MHz
@ CCLK = 500 MHz
@ CCLK = 500 MHz
@ V
@ V
@ V
@ CCLK = 500 MHz, V
@ CCLK = 500 MHz, V
@ SCLK = 62.5 MHz, V
@ CCLK = 500 MHz, V
DD
DD
DD
, V
, V
, V
DD_IO
DD_IO
DD_IO
= Max
= Max
= Min
DD
DD
DD_DRAM
DD_IO
= 1.05 V, T
= 1.05 V, T
= 2.5 V, T
= 1.5 V, T
Table
CASE
CASE
CASE
CASE
= 25
= 25
18, based on the transient duty cycle. The dc case is equivalent
= 25
= 25
°
°
C
C
°
C
°
C 050
050
(all)
(all)
(all)
(all)
050
050
(all)
(all)
(all)
Grade
050
050
A
Ordering Guide on Page
1
Min
1.00
1.00
2.38
1.425
–40
1.7
1.9
–0.33
(V
(V
DD_IO
CLOCK
ADSP-TS202S
_
DRIVE
× 0.56)±5%
2.50
Typ
1.05
1.05
1.500
2.06
20
0.15
0.25
× 0.56) ±5%
46.
Max
1.10
1.10
2.63
1.575
+85
3.63
3.63
+0.8
50
0.40
Unit
V
V
V
V
°C
V
V
V
A
mA
A
A
V
V