ADSP-TS202S_06 AD [Analog Devices], ADSP-TS202S_06 Datasheet - Page 22

• Manufacturer Part Number: ADSP-TS202S_06
• Description: TigerSHARC Embedded Processor
• Manufacturer: AD [Analog Devices]

ADSP-TS202S
Table 18. Maximum Duty Cycle for Input Transient Voltage
1
2
ELECTRICAL CHARACTERISTICS
1
2
3
V
+3.63
+3.64
+3.70
+3.78
+3.86
+3.93
Parameter Description
V
V
I
I
I
I
I
I
I
I
I
I
I
I
I
C
Parameter name suffix conventions: no suffix = applies to pins without pull-up or pull-down resistors; _PD = applies to pin types (pd) or
(pd_0); _PU = applies to pin types (pu) or (pu_0); _PU_AD = applies to pin types (pu_ad); _OD = applies to pin types OD; _PD_L = applies
to pin types (pd_l).
The individual values cannot be combined for analysis of a single instance of
Duty cycle refers to the percentage of time the signal exceeds the value for the
Applies to output and bidirectional pins.
Applies to all signals.
Guaranteed but not tested.
IH
IH_PU
IH_PD
IH_PD_L
IL
IL_PU
IL_PU_AD
OZH
OZH_PD
OZL
OZL_PU
OZL_PU_AD
OZL_OD
overshoot or undershoot. The worst case observed value must fall within one of
the voltages specified and the total duration of the overshoot or undershoot
(exceeding the 100% case) must be less than or equal to the corresponding duty
cycle.
100% case. This is equivalent to the measured duration of a single instance of
overshoot or undershoot as a percentage of the period of occurrence. The
practical worst case for period of occurrence for either overshoot or undershoot
is 2 × t
OH
OL
IN
IN
Max (V)
SCLK
.
1
High Level Output Voltage
Low Level Output Voltage
High Level Input Current
High Level Input Current
High Level Input Current
High Level Input Current
Low Level Input Current
Low Level Input Current
Low Level Input Current
Three-State Leakage Current High
Three-State Leakage Current High
Three-State Leakage Current Low
Three-State Leakage Current Low
Three-State Leakage Current Low
Three-State Leakage Current Low
Input Capacitance
V
–0.33
–0.34
–0.40
–0.48
–0.56
–0.63
IN
Min (V)
2, 3
1
1
1
Maximum Duty
Cycle
100%
90%
50%
30%
17%
10%
2
Rev. C | Page 22 of 48 | December 2006
Test Conditions
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ f
IN
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
= 1 MHz, T
= Min, I
= Min, I
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
CASE
OH
OL
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
= 4 mA
= –2 mA
= V
= V
= V
= V
= 0 V
= 0 V
= 0 V
= V
= V
= 0 V
= 0 V
= 0 V
= 0 V
= 25
IH
IH
DD_IO
IH
IH
DD_IO
°
Max
Max
Max
Max
C, V
Max
Max
IN
= 2.5 V
Min
2.18
0.3
30
0.3
30
0.3
0.3
30
4
Max
0.4
20
20
0.76
76
20
0.76
100
50
0.76
20
0.76
100
7.6
3
Unit
V
V
μA
μA
mA
μA
μA
mA
μA
μA
mA
μA
mA
μA
mA
pF