M30622MA-XXXFP RENESAS [Renesas Technology Corp], M30622MA-XXXFP Datasheet - Page 296

• Manufacturer Part Number: M30622MA-XXXFP
• Description: 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
• Manufacturer: RENESAS [Renesas Technology Corp]

Timer A
(2) Count source
(3) Frequency division ratio
(4) Reading the timer
(5) Writing to the timer
(6) Relation between the input/output to/from the timer and the direction register
(7) Pins related to timer A
(8) Registers related to timer A
The internal count source can be selected from f1, f
by dividing the CPU's main clock by 1, 8, and 32 respectively. Clock f
CPU's secondary clock by 32.
In timer mode or pulse width modulation mode, [the value set in the timer register + 1] becomes the
frequency division ratio. In event counter mode, [the set value + 1] becomes the frequency division
ratio when a down count is performed, or [FFFF
ratio when an up count is performed. In one-shot timer mode, the value set in the timer register be-
comes the frequency division ratio.
The counter overflows (or underflows) when a count source equal to a frequency division ratio is input,
and an interrupt occurs. For the pulse output function, the output from the port varies (the value in the
port register does not vary).
Either in timer mode or in event counter mode, reading the timer register takes out the count at that
moment. Read it in 16-bit units. The data either in one-shot timer mode or in pulse width modulation
mode is indeterminate.
To write to the timer register when a count is in progress, the value is written only to the reload register.
When writing to the timer register when a count is stopped, the value is written both to the reload
register and to the counter. Write a value in 16-bit units.
With the output function of the timer, pulses are output regardless of the direction register of the
relevant port. To input an external signal to the timer, set the direction register of the relevant port to
input.
(a) TA0
(b) TA0
Figure 2.2.1 shows the memory map of timer A-related registers. Figures 2.2.2 through 2.2.5 show
timer A-related registers.
OUT
IN
, TA1
, TA1
IN
OUT
, TA2
, TA2
IN
, TA3
OUT
, TA3
IN
, TA4
OUT
, TA4
IN
OUT
16
Input pins to timer A.
Output pins from timer A. They become input pins to
timer A when event counter mode is active.
- the set value + 1] becomes the frequency division
8
, f
32
, and f
C32
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
. Clocks f
C32
is derived by dividing the
1
, f
8
, and f
Mitsubishi microcomputers
M16C / 62 Group
32
are derived
281