M30622MA-XXXFP RENESAS [Renesas Technology Corp], M30622MA-XXXFP Datasheet - Page 555

• Manufacturer Part Number: M30622MA-XXXFP
• Description: 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
• Manufacturer: RENESAS [Renesas Technology Corp]

External Buses
540
5.6 Releasing an External Bus (HOLD input and HLDA output)
The Hold feature is to relinquish the address bus, the data bus, and the control bus on M16C/62 side in line
with the Hold request from the bus master other than M16C/62 when the two or more bus masters share the
address bus, the data bus, and the control bus. The Hold feature is effective only in memory expansion
mode and microprocessor mode.
The sequence of using the Hold feature may be:
As given above, each bus invariably gets in the high-impedance state while the HLDA output is “L”. Also,
M16C/62 doesn't relinquish buses during a bus cycle. That is, if a Hold request comes in during a bus cycle,
the HLDA output become “L” after that bus cycle finishes.
In the Hold state, the state of each terminal becomes as follows.
Figure. 5.6.1 shows an example of relinquishing external buses.
1. The external bus master turns the input level of the HOLD terminal to “L”.
2. When M16C/62 becomes ready to relinquish buses, each bus becomes high-impedance state at the
3. The HLDA terminal becomes “L” at the rising edge of the next BCLK.
4. The external bus master uses a bus.
5. When the external bus master finishes using a bus, the external bus master returns the input level of
6. The output from HLDA terminal becomes “H” at the rising edge of the next BCLK.
7. Each bus returns from the high-impedance state to the former state at the rising edge of the next
• Address bus A
• Data bus D
• RD, WR, WRL, WRH, BHE
• ALE
• CS0 to CS3
__________
_____
_______
High-impedance state. The case in which A
space) and the case in which A
whole area) in microprocessor mode too fall under this category.
High-impedance state. The case in which D
width) and the case in which D
whole area) in microprocessor mode too fall under this category.
High-impedance state.
An internal clock signal having the same phase as BCLK is output.
High-impedance state. The case in which ports are selected by the chip selection control register too
falls under this category.
falling edge of BCLK.
the HOLD terminal to “H”.
BCLK.
______
__________
__________
_______
________
0
to D
_________ ________
0
__________
15
to A
19
0
9
__________
to D
to A
15
19
are used as ports P0
are used as ports P3
16
8
to D
to A
19
15
__________
are used as ports P4
are used as ports P1
_________
0
1
to P0
to P3
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
7
7
and P1
and P4
0
0
__________
to P4
to P1
0
0
to P4
to P1
3
7
(64K byte address
7
Mitsubishi microcomputers
3
(8-bit external bus
M16C / 62 Group
(multiplex for the
(multiplex for the