AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 159

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

9
8
7
MPSE
FDLSE
PSE
Magic Packet Status Enable.
When this bit is set to 1, a value of
1 is passed to the LEDOUT bit in
this register when Magic Packet
frame mode is enabled and a
Magic Packet frame is detected
on the network.
Full-Duplex Link Status Enable.
Indicates the Full-Duplex Link
Test Status. When this bit is set,
a value of 1 is passed to the LED-
OUT signal when the Am79C971
controller is functioning in a Link
Pass state and full-duplex opera-
tion
Am79C971 controller is not func-
tioning in a Link Pass state with
full-duplex operation being en-
abled, a value of 0 is passed to
the LEDOUT signal.
Pulse Stretcher Enable. When
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
Read/Write accessible always.
MPSE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
When the 10BASE-T port is ac-
tive, a value of 1 is passed to the
LEDOUT signal whenever the
Link Test Function (described in
the T-MAU section) detects a
Link Pass state and the FDEN
(BCR9, bit 0) bit is set. When the
AUI port is active, a value of 1 is
passed to the LEDOUT signal
whenever full-duplex operation
on the AUI port is enabled (both
FDEN and AUIFD bits in BCR9
are set to 1).
Read/Write accessible always.
FDLSE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Read/Write accessible always.
PSE is set to 1 by H_RESET and
is not affected by S_RESET or
setting the STOP bit.
is
enabled.
When
P R E L I M I N A R Y
the
Am79C971
6
5
4
3
LNKSE
RCVME
XMTE
RXPOLE
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
when the T-MAU is in Link Pass
state. When the T-MAU is in Link
Fail state, a value of 0 is passed
to the LEDOUT bit. This bit does
not reflect the link status of the
external PHY.
The function of this bit is masked
if the 10BASE-T port is operating
in full-duplex mode. This allows a
Half-Duplex Link Status LED and
a Full-Duplex Link Status LED at
the same time.
Read/Write accessible always.
LNKSE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Receive Match Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast, and promiscuous.
Read/Write accessible always.
RCVME is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
Read/Write accessible always.
XMTE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Receive Polarity Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when normal polarity of
the RXD pair has not been re-
versed.
Receive polarity indication is
valid only if the T-MAU is in link
pass state.
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