UPD61052 NEC, UPD61052 Datasheet - Page 41

• Manufacturer Part Number: UPD61052
• Description: MPEG2 Audio / Video Encoder
• Manufacturer: NEC

(1) Data transfer register
mode register while transferring. When canceling a transfer while transferring, it stops a transfer. At this time, the
data in the transfer buffer becomes invalid. The transfer of SDR with once is to a maximum of 128 bytes. If host CPU
stops the transfer, host CPU should operate transfer error handling.
20H
Address
More than one bit cannot be set to 1 at the same time. It becomes a transfer error when writing at the transfer
Note Set internal CPU reset (with Register 3EH←02H)
7
6
5
4
3
2
1
0
Bit7
SI
Bit
SSD
Bit6
SI
SSD
SDI
MSD
MI
SDW
SDR
Field
Bit5
SDI
Host CPU→instruction RAM of internal CPU
0: Releasing of transfer, 1: Transfer
Host CPU→SDRAM
0: Releasing of transfer, 1: Transfer
SDRAM→instruction RAM of internal CPU
0: Releasing of transfer, 1: Transfer
Instruction ROM→SDRAM
0: Releasing of transfer, 1: Transfer
Instruction ROM→instruction RAM of internal CPU
0: Releasing of transfer, 1: Transfer
Reserved (set only 0)
Host CPU→SDRAM
0: Releasing of transfer,1: Transfer
SDRAM→host CPU
0: Releasing of transfer, 1: Transfer
MSD
Bit4
Data Sheet S15082EJ4V0DS
Bit3
MI
Function
Bit2
Note
Note
Note
Note
Note
SDW
Bit1
SDR
Bit0
µ
PD61051, 61052
R/W
R/W
0
0
0
0
0
0
0
0
Initial value
Download mode
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