UPD61052 NEC, UPD61052 Datasheet - Page 61

• Manufacturer Part Number: UPD61052
• Description: MPEG2 Audio / Video Encoder
• Manufacturer: NEC

4.8
4.8.1
RAM of internal CPU transfer, the host CPU → SDRAM transfer (SSD, SDW), the external ROM → SDRAM transfer
and the external ROM → the instruction RAM of internal CPU transfer)
It is the error handling of DMA-ERR which occurs when interrupting the transfers (the host CPU → the instruction
Transfer Error Handling
Transfer error handling 1
Set destination address register
Host CPU → SDRAM transfer
Host CPU → SDRAM transfer
Data Sheet S15082EJ4V0DS
(27H to 29H) ← 04H setting
to unused area of SDRAM
Interrupt register 0 (30H)
Transfer counter register
Clear the transfer error
Transfer mode register
Transfer mode register
(3FH) ← Dummy data
Transfer data register
(20H) ← 02H setting
(20H) ← 00H setting
(30H) ← 01H setting
Interrupt register 0
Interrupt register 0
writing ending?
← 04H setting
Transfer error
(24H to 26H)
(30H): 01H
handling 1
All data
release
Return
CINT?
Y
Y
Y
N
N
N
µ
PD61051, 61052
61