UPD61052 NEC, UPD61052 Datasheet - Page 44

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UPD61052

Manufacturer Part Number
UPD61052
Description
MPEG2 Audio / Video Encoder
Manufacturer
NEC
Datasheet

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(4) Transfer data counter register
of transfer from instructions ROM, SDRAM host CPU to the instruction RAM of internal CPU, it sets the number of the
transfer bytes /4 by the 4 byte unit.
(5) Transfer data register
44
27H
28H
29H
3FH
Address
Address
It sets the transfer data number of the bytes.
In case of transfer between host CPU and SDRAM, it sets the number of the transfer bytes by 4 bytes unit. In case
This register is transfer data window.
Bit7
Bit7
SDRAM address
= DA16 to DA0×128
SDRAM address
= DA16 to DA0×128+5
Bit6
Bit6
Bit5
Bit5
Byte11
Byte15
Byte19
Byte3
Byte7
Transfer buffer
(128 bytes)
Bit4
Bit4
TC15 to TC8
Figure 3-6. SDRAM Write
TC7 to TC0
TD7 to TD0
Data Sheet S15082EJ4V0DS
Bit3
Bit3
Byte10
Byte14
Byte18
Byte2
Byte6
Host CPU write
TD7 to TD0
Byte0
Byte1
Byte2
Byte3
Byte4
Byte5
Byte6
Byte7
Byte8
Bit2
Bit2
Byte13
Byte17
Lower byte first
TC18 to TC16
Byte1
Byte5
Byte9
Bit1
Bit1
Bit0
Bit0
Byte12
Byte16
Byte0
Byte4
Byte8
R/W
R/W
R/W
R/W
R/W
R/W
µ
SDRAM
PD61051, 61052
Transfer data count
Transfer data count
Transfer data count
Transfer data

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