UPD61052 NEC, UPD61052 Datasheet - Page 49

• Manufacturer Part Number: UPD61052
• Description: MPEG2 Audio / Video Encoder
• Manufacturer: NEC

3.2.8
serial bus. The reset of the RESET pin or ALL RESET of the reset register initializes this address to 7H.
3.2.9
reset register initializes this address to 0H.
35H
36H
Address
Address
It specifies the access cycle of the instruction ROM of internal CPU when connecting host CPU interface with the
This register sets the active polarity of ISREQ and OSVLD. The reset of the RESET pin or ALL RESET of the
ROM access cycle register
Port setup register
7 to 3
2 to 0
7 to 2
1
0
Bit7
Bit7
Bit
Bit
Bit6
Bit6
iROM2 to
iROM0
ISREQ
OSVLD
Field
Field
Bit5
Bit5
Reserved (Set 0)
Access cycle of instruction ROM
0: Reserved, 1 to 7: (Setting value+2) by 24.6 MHz
Reserved (Set 0)
Active polarity of ISREQ
0: Low active of request, 1: High active of request
Active polarity of OSVLD/OSRDY
0: Low active of valid/ready
1: High active of valid/ready
Bit4
Bit4
Data Sheet S15082EJ4V0DS
Bit3
Bit3
Function
Function
Bit2
Bit2
iROM2 to iROM0
ISREQ
Bit1
Bit1
OSVLD
Bit0
Bit0
µ
PD61051, 61052
R/W
R/W
R/W
R/W
7H
0
0
Initial value
Initial value
Mask ROM cycle
Port setup
49