S9S12GN16F0CFT Freescale Semiconductor, S9S12GN16F0CFT Datasheet - Page 342

• Manufacturer Part Number: S9S12GN16F0CFT
• Description: 16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
• Manufacturer: Freescale Semiconductor

Specifications of S9S12GN16F0CFT

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 1024 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TSSOP-20
• Mounting Style: SMD/SMT

S12S Debug Module (S12SDBGV2)
8.4.5.4
Field3 Bits in Compressed Pure PC Modes
Each time that PC[17:6] differs from the previous base PC[17:6], then a new base address is stored. The
base address zero value is the lowest address in the 64 address range
The first line of the trace buffer always gets a base PC address, this applies also on rollover.
344
PC16
Pure PC Mode
Bit
Compressed
0
INF1
Mode
0
0
1
1
Program Counter bit 16— In Normal and Loop1 mode this bit corresponds to program counter bit 16.
Trace Buffer Organization (Compressed Pure PC mode)
Configured for end aligned triggering in compressed PurePC mode, then
after rollover it is possible that the oldest base address is overwritten. In this
case all entries between the pointer and the next base address have lost their
base address following rollover. For example in
rollover has occurred, Line 1, PC1, is overwritten with a new entry. Thus the
entries on Lines 2 and 3 have lost their base address. For reconstruction of
program flow the first base address following the pointer must be used, in
the example, Line 4. The pointer points to the oldest entry, Line 2.
Table 8-40. Trace Buffer Organization Example (Compressed PurePC mode)
INF0
0
1
0
1
Table 8-41. Compressed Pure PC Mode Field 3 Information Bit Encoding
Number
Line 1
Line 2
Line 3
Line 4
Line 5
Line 6
Line
Base PC address TB[17:0] contains a full PC[17:0] value
Trace Buffer[5:0] contain incremental PC relative to base address zero value
Trace Buffer[11:0] contain next 2 incremental PCs relative to base address zero value
Trace Buffer[17:0] contain next 3 incremental PCs relative to base address zero value
Field 3
2-bits
00
11
01
00
10
00
Table 8-39. PCH Field Descriptions (continued)
MC9S12G Family Reference Manual, Rev.1.23
Field 2
6-bits
PC4
0
0
TRACE BUFFER ROW CONTENT
NOTE
PC1 (Initial 18-bit PC Base Address)
PC6 (New 18-bit PC Base Address)
PC9 (New 18-bit PC Base Address)
Description
Table 8-40
Field 1
6-bits
PC3
PC8
0
if one line of
Freescale Semiconductor
Field 0
6-bits
PC2
PC5
PC7