S9S12GN16F0CFT Freescale Semiconductor, S9S12GN16F0CFT Datasheet - Page 835

Manufacturer Part Number

S9S12GN16F0CFT

16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM

Manufacturer

Freescale Semiconductor

Processor Series

Data Bus Width

Maximum Clock Frequency

Program Memory Size

Data Ram Size

Operating Supply Voltage

3.13 V to 5.5 V

Operating Temperature Range

- 40 C to + 85 C

Package / Case

Mounting Style

Freescale Semiconductor

Clock Divider Loaded

0 FCLKDIV register has not been written since the last reset

1 FCLKDIV register has been written since the last reset

Clock Divider Locked

0 FDIV ﬁeld is open for writing

1 FDIV value is locked and cannot be changed. Once the lock bit is set high, only reset can clear this bit and

Clock Divider Bits — FDIV[5:0] must be set to effectively divide BUSCLK down to 1 MHz to control timed events

during Flash program and erase algorithms.

BUSCLK frequency. Please refer to

restore writability to the FDIV ﬁeld in normal mode.

The FCLKDIV register should never be written while a Flash command is

executing (CCIF=0).

BUSCLK is Greater Than this value.

BUSCLK is Less Than or Equal to this value.

BUSCLK Frequency

Table 25-8. FDIV values for various BUSCLK Frequencies

MC9S12G Family Reference Manual, Rev.1.23

Table 25-7. FCLKDIV Field Descriptions

Section 25.4.4, “Flash Command Operations,”

BUSCLK Frequency

shows recommended values for FDIV[5:0] based on the

32 KByte Flash Module (S12FTMRG32K1V1)

for more information.