S9S12GN16F0CFT Freescale Semiconductor, S9S12GN16F0CFT Datasheet - Page 537

• Manufacturer Part Number: S9S12GN16F0CFT
• Description: 16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
• Manufacturer: Freescale Semiconductor

Specifications of S9S12GN16F0CFT

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 1024 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TSSOP-20
• Mounting Style: SMD/SMT

15.3.2.9
This read-only register contains the Conversion Complete Flags CCF[15:0].
Read: Anytime
Write: Anytime (for details see
Freescale Semiconductor
Module Base + 0x000A
CCF[15:0]
Reset
Field
15–0
W
R
15
0
Conversion Complete Flag n (n= 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) (n conversion number, NOT
channel number!)— A conversion complete flag is set at the end of each conversion in a sequence. The flags
are associated with the conversion position in a sequence (and also the result register number). Therefore in
non-fifo mode, CCF[4] is set when the fifth conversion in a sequence is complete and the result is available in
result register ATDDR4; CCF[5] is set when the sixth conversion in a sequence is complete and the result is
available in ATDDR5, and so forth.
If automatic compare of conversion results is enabled (CMPE[n]=1 in ATDCMPE), the conversion complete flag
is only set if comparison with ATDDRn is true. If ACMPIE=1 a compare interrupt will be requested. In this case,
as the ATDDRn result register is used to hold the compare value, the result will not be stored there at the end of
the conversion but is lost.
In case of a concurrent set and clear on CCF[n]: The clearing by method A) will overwrite the set. The clearing
by methods B) or C) or D) will be overwritten by the set.
0 Conversion number n not completed or successfully compared
1 If (CMPE[n]=0): Conversion number n has completed. Result is ready in ATDDRn.
ATD Status Register 2 (ATDSTAT2)
= Unimplemented or Reserved
If (CMPE[n]=1): Compare for conversion result number n with compare value in ATDDRn, using compare
operator CMPGT[n] is true. (No result available in ATDDRn)
A flag CCF[n] is cleared when one of the following occurs:
A) Write to ATDCTL5 (a new conversion sequence is started)
B) If AFFC=0, write “1” to CCF[n]
C) If AFFC=1 and CMPE[n]=0, read of result register ATDDRn
D) If AFFC=1 and CMPE[n]=1, write to result register ATDDRn
14
0
13
0
12
Figure 15-11. ATD Status Register 2 (ATDSTAT2)
0
Table 15-18
Table 15-18. ATDSTAT2 Field Descriptions
MC9S12G Family Reference Manual, Rev.1.23
11
0
10
0
below)
0
9
CCF[15:0]
0
8
Description
0
7
0
6
Analog-to-Digital Converter (ADC10B16CV2)
0
5
4
0
0
3
0
2
0
1
0
0
539