S9S12P128J0MFTR Freescale Semiconductor, S9S12P128J0MFTR Datasheet - Page 1152

• Manufacturer Part Number: S9S12P128J0MFTR
• Description: 16-bit Microcontrollers - MCU 16 BIT 128K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12P128J0MFTR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8192 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: QFN-48
• Mounting Style: SMD/SMT

240 KByte Flash Module (S12FTMRG240K2V1)
31.3.2.7
The FSTAT register reports the operational status of the Flash module.
1
CCIF, ACCERR, and FPVIOL bits are readable and writable, MGBUSY and MGSTAT bits are readable
but not writable, while remaining bits read 0 and are not writable.
1154
Reset value can deviate from the value shown if a double bit fault is detected during the reset sequence (see
ACCERR
Offset Module Base + 0x0006
DFDIE
Reset
SFDIE
FPVIOL
Field
Field
CCIF
1
0
W
7
5
4
R
CCIF
Double Bit Fault Detect Interrupt Enable — The DFDIE bit controls interrupt generation when a double bit fault
is detected during a Flash block read operation.
0 DFDIF interrupt disabled
1 An interrupt will be requested whenever the DFDIF flag is set (see
Single Bit Fault Detect Interrupt Enable — The SFDIE bit controls interrupt generation when a single bit fault
is detected during a Flash block read operation.
0 SFDIF interrupt disabled whenever the SFDIF flag is set (see
1 An interrupt will be requested whenever the SFDIF flag is set (see
Flash Status Register (FSTAT)
1
7
Command Complete Interrupt Flag — The CCIF flag indicates that a Flash command has completed. The
CCIF flag is cleared by writing a 1 to CCIF to launch a command and CCIF will stay low until command
completion or command violation.
0 Flash command in progress
1 Flash command has completed
Flash Access Error Flag — The ACCERR bit indicates an illegal access has occurred to the Flash memory
caused by either a violation of the command write sequence (see
command. While ACCERR is set, the CCIF flag cannot be cleared to launch a command. The ACCERR bit is
cleared by writing a 1 to ACCERR. Writing a 0 to the ACCERR bit has no effect on ACCERR.
0 No access error detected
1 Access error detected
Flash Protection Violation Flag —The FPVIOL bit indicates an attempt was made to program or erase an
address in a protected area of P-Flash or EEPROM memory during a command write sequence. The FPVIOL
bit is cleared by writing a 1 to FPVIOL. Writing a 0 to the FPVIOL bit has no effect on FPVIOL. While FPVIOL
is set, it is not possible to launch a command or start a command write sequence.
0 No protection violation detected
1 Protection violation detected
= Unimplemented or Reserved
0
0
6
Figure 31-11. Flash Status Register (FSTAT)
Table 31-14. FERCNFG Field Descriptions
MC9S12G Family Reference Manual,
Table 31-15. FSTAT Field Descriptions
ACCERR
0
5
FPVIOL
0
4
Description
Description
MGBUSY
0
3
Rev.1.23
Section
Section
Section
Section
RSVD
31.3.2.8)
0
2
31.4.4.2) or issuing an illegal Flash
31.3.2.8)
31.3.2.8)
Freescale Semiconductor
0
1
1
MGSTAT[1:0]
Section
0
0
1
31.6).