S9S12P128J0MFTR Freescale Semiconductor, S9S12P128J0MFTR Datasheet - Page 613

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S9S12P128J0MFTR

Manufacturer Part Number
S9S12P128J0MFTR
Description
16-bit Microcontrollers - MCU 16 BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P128J0MFTR

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8192 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
18.3.3.2
The eight data segment registers, each with bits DB[7:0], contain the data to be transmitted or received.
The number of bytes to be transmitted or received is determined by the data length code in the
corresponding DLR register.
Module Base + 0x00X4 to Module Base + 0x00XB
18.3.3.3
This register keeps the data length field of the CAN frame.
Freescale Semiconductor
Module Base + 0x00X2
Module Base + 0x00X3
DB[7:0]
Field
7-0
Reset:
Reset:
Reset:
W
W
R
R
Figure 18-34. Data Segment Registers (DSR0–DSR7) — Extended Identifier Mapping
W
R
Data bits 7-0
Data Segment Registers (DSR0-7)
Data Length Register (DLR)
7
x
7
x
DB7
7
x
Figure 18-32. Identifier Register 2 — Standard Mapping
Figure 18-33. Identifier Register 3 — Standard Mapping
= Unused; always read ‘x’
= Unused; always read ‘x’
Table 18-33. DSR0–DSR7 Register Field Descriptions
6
x
6
x
DB6
x
6
MC9S12G Family Reference Manual, Rev.1.23
5
x
5
x
DB5
5
x
4
x
4
x
DB4
Description
4
x
Freescale’s Scalable Controller Area Network (S12MSCANV3)
x
x
DB3
3
3
x
3
DB2
2
x
2
x
2
x
DB1
x
x
1
1
1
x
DB0
0
x
0
x
x
0
615

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