S9S12P128J0MFTR Freescale Semiconductor, S9S12P128J0MFTR Datasheet - Page 414

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S9S12P128J0MFTR

Manufacturer Part Number
S9S12P128J0MFTR
Description
16-bit Microcontrollers - MCU 16 BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P128J0MFTR

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8192 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
S12 Clock, Reset and Power Management Unit (S12CPMU)
The APIR[15:0] bits determine the interrupt period. APIR[15:0] can only be written when APIFE is
cleared. As soon as APIFE is set, the timer starts running for the period selected by APIR[15:0] bits. When
the configured time has elapsed, the flag APIF is set. An interrupt, indicated by flag APIF = 1, is triggered
if interrupt enable bit APIE = 1. The timer is re-started automatically again after it has set APIF.
The procedure to change APICLK or APIR[15:0] is first to clear APIFE, then write to APICLK or
APIR[15:0], and afterwards set APIFE.
The API Trimming bits ACLKTR[5:0] must be set so the minimum period equals 0.2 ms if stable
frequency is desired.
See
It is possible to generate with the API a waveform at the external pin API_EXTCLK by setting APIFE and
enabling the external access with setting APIEA.
10.7
10.7.1
Usually applications run in MCU Normal Mode
It is recommended to write the CPMUCOP register in any case from the application program initialization
routine after reset no matter if the COP is used in the application or not, even if a configuration is loaded
via the flash memory after reset
right value for the application) the write once for the COP configuration bits (WCOP,CR[2:0]) takes place
which protects these bits from further accidental change
runaway) the COP configuration can not be accidentally modified anymore
10.7.2
In many applications the COP is used to check that the program is running and sequencing properly
the COP is kept running during Stop Mode and periodic wake-up events are needed to service the COP on
time and maybe to check the system status
For such an application it is recommended to use the ACLK as clock source for both COP and API
guarantees lowest possible IDD current during Stop Mode
using the same clock source for both, COP and API
The Interrupt Service Routine (ISR) of the Autonomous Periodic Interrupt API should contain the write
instruction to the CPMUARMCOP register
(alternating sequence of $55 and $AA) of the application software
Using this method, then in the case of a runtime or program sequencing issue the application “main
routine” is not executed properly anymore and the alternating values are not provided properly
416
Table 10-18
Initialization/Application Information
General Initialization information
Application information for COP and API usage
The first period after enabling the counter by APIFE might be reduced by
API start up delay t
for the trimming effect of ACLKTR[5:0].
.
By doing a “controlled” write access in MCU Normal Mode (with the
MC9S12G Family Reference Manual,
sdel
.
.
.
The value (byte) written is derived from the “main routine”
.
NOTE
.
.
In case of a program sequencing issue (code
.
Additionally it eases software implementation
Rev.1.23
.
.
Freescale Semiconductor
.
Hence the
.
Often
.
This

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