S9S12P128J0MFTR Freescale Semiconductor, S9S12P128J0MFTR Datasheet - Page 1232

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S9S12P128J0MFTR

Manufacturer Part Number
S9S12P128J0MFTR
Description
16-bit Microcontrollers - MCU 16 BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P128J0MFTR

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8192 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
1
2
3
Conditions are shown in
NUM C
Electrical Characteristics
A.8
A.8.1
With each transition of the feedback clock, the deviation from the reference clock is measured and input
voltage to the VCO is adjusted accordingly.The adjustment is done continuously with no abrupt changes
in the VCOCLK frequency. Noise, voltage, temperature and other factors cause slight variations in the
control loop resulting in a clock jitter. This jitter affects the real minimum and maximum clock periods as
illustrated in
1234
T
Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated to
25°C using the Arrhenius equation. For additional information on how Freescale defines Typical Data Retention, please refer to
Engineering Bulletin EB618
Spec table quotes typical endurance evaluated at 25°C for this product family. For additional information on how Freescale defines
Typical Endurance, please refer to Engineering Bulletin EB619.
1
2
3
4
5
6
Javg
C Data retention at an average junction temperature of T
C Program Flash number of program/erase cycles
C Data retention at an average junction temperature of T
C Data retention at an average junction temperature of T
C Data retention at an average junction temperature of T
C EEPROM number of program/erase cycles (-40°C ≤ Tj ≤ 150°C)
does not exceed 85°C in a typical temperature profile over the lifetime of a consumer, industrial or automotive application.
after up to 10,000 program/erase cycles
(-40°C ≤ Tj ≤ 150°C)
after up to 100,000 program/erase cycles
after up to 10,000 program/erase cycles
after less than 100 program/erase cycles
Phase Locked Loop
Jitter Definitions
Figure
Table A-4
A-4.
unless otherwise noted
Table A-35. NVM Reliability Characteristics
MC9S12G Family Reference Manual,
Rating
Program Flash Arrays
EEPROM Array
Javg
Javg
Javg
Javg
= 85°C
= 85°C
= 85°C
= 85°C
1
1
1
1
Rev.1.23
Symbol
t
t
t
t
NVMRET
NVMRET
NVMRET
NVMRET
n
n
FLPE
FLPE
100K
Min
10K
20
10
20
5
100K
500K
Freescale Semiconductor
100
100
100
100
Typ
2
2
2
2
3
3
Max
Cycles
Cycles
Years
Years
Years
Years
Unit

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