AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 365
AT91SAM7S256D-AU
Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet
1.AT91SAM7S256D-AU.pdf
(775 pages)
Specifications of AT91SAM7S256D-AU
Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7S256D-AU
Manufacturer:
ATMEL
Quantity:
101
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31.6.1.1
31.6.1.2
Table 31-2.
Source Clock
12 000 000
12 288 000
14 318 180
3 686 400
4 915 200
5 000 000
7 372 800
8 000 000
Figure 31-5. Baud Rate Generator
If the USART is programmed to operate in asynchronous mode, the selected clock is first divided by CD, which is
field programmed in the Baud Rate Generator Register (US_BRGR). The resulting clock is provided to the receiver
as a sampling clock and then divided by 16 or 8, depending on the programming of the OVER bit in US_MR.
If OVER is set to 1, the receiver sampling is 8 times higher than the baud rate clock. If OVER is cleared, the sam-
pling is performed at 16 times the baud rate clock.
The following formula performs the calculation of the Baud Rate.
This gives a maximum baud rate of MCK divided by 8, assuming that MCK is the highest possible clock and that
OVER is programmed at 1.
Table 31-2
This table also shows the actual resulting baud rate and the error.
MHz
Baud Rate in Asynchronous Mode
Baud Rate Calculation Example
Baudrate
Baud Rate Example (OVER = 0)
SCK
shows calculations of CD to obtain a baud rate at 38400 bauds for different source clock frequencies.
Reserved
MCK/DIV
=
Expected Baud
MCK
--------------------------------------------- -
(
SelectedClock
8 2 Over
(
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
Rate
Bit/s
–
USCLKS
0
1
2
3
)CD
)
Calculation Result
16-bit Counter
12.00
13.02
19.53
20.00
23.30
CD
6.00
8.00
8.14
USCLKS = 3
0
SYNC
CD
>1
1
0
CD
12
13
20
20
23
6
8
8
1
0
Actual Baud Rate
OVER
SAM7S Series [DATASHEET]
Sampling
Divider
38 400.00
38 400.00
39 062.50
38 400.00
38 461.54
37 500.00
38 400.00
38 908.10
Bit/s
FIDI
0
1
6175M–ATARM–26-Oct-12
SYNC
SCK
Baud Rate
Sampling
Clock
Clock
0.00%
0.00%
1.70%
0.00%
0.16%
2.40%
0.00%
1.31%
Error
365
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