AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 736

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

40.23.2
40.23.2.1
40.23.2.2
40.23.3
40.23.3.1
40.23.3.2
40.23.3.3
40.23.3.4
When NRST or PA0-PA16 or PA21-PA31 are set as digital inputs with pull-up enabled, the voltage of the I/O stabi-
lizes at VPull-up.
Vpull-up
This condition causes a leakage through VDDIO. This leakage is 45 µA per pad in worst case at 3.3 V and 25 µA at
1.8V.
I Leakage
It is recommended to use an external pull-up if needed.
When NRST or PA0-PA16 and or PA21-PA31 are set as digital inputs with pull-up enabled, driving the I/O with an
output impedance higher than 500 ohms may not drive the I/O to a logical zero.
Output impedance must be lower than 500 ohms.
If the Channel Counter Register value is 0 or 1, the Channel Period Register or Channel Duty Cycle Register is
directly modified when writing the Channel Update Register.
Check the Channel Counter Register before writing the update register.
When Channel Period Register equals 0, the period update is not operational.
Do not write 0 in the period register.
In left aligned mode, the first start value of the counter is 0. For the other periods, the counter starts at 1.
None.
Setting Channel Duty Cycle Register (PWM_CDTYx) at 0 in center aligned mode or at 0 or 1 in left aligned mode
may change the polarity of the signal.
VPull-up Min
VDDIO - 0.65 V
Parameter
I Leakage at 3,3V
I Leakage at 1.8V
Parallel Input/Output Controller (PIO)
Pulse Width Modulation Controller (PWM)
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
PWM: Update when PWM_CCNTx = 0 or 1
PWM: Update when PWM_CPRDx = 0
PWM: Counter Start Value
PWM: Constraints on Duty Cycle Value
VPull-up Max
VDDIO - 0.45 V
Typ
2.5
1
µA
µA
Max
45
25
µA
µA
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
736