ATAES132-TH-EQ Atmel, ATAES132-TH-EQ Datasheet - Page 105

• Manufacturer Part Number: ATAES132-TH-EQ
• Description: EEPROM AES 32Kbit EE SPI
• Manufacturer: Atmel

Specifications of ATAES132-TH-EQ

• Rohs: yes
• Maximum Clock Frequency: 10 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-8
• Interface Type: SPI
• Factory Pack Quantity: 2300

Appendix I.
I.1.
The ATAES132 implements all its cryptographic commands using AES in CCM mode, with a 128 bit key length per NIST
SP800-38C. CCM mode provides both confidentiality and integrity checking with a single key. The integrity MAC includes both
the encrypted data and additional authenticate-only data bytes. The particular information authenticated with each command is
described within the command descriptions in Section 7.
The device construction ensures that the nonce will be unique for each MAC calculated.
MacCount
The one byte MacCount is stored in an internal register and is used in the AES-CCM computations. Since MacCount changes,
it speeds up computation by eliminating the need to generate a new random nonce for every crypto computation. This register
is incremented prior to performing each MAC calculation.
The MacCount register is set to zero when the nonce command is executed and is subsequently incremented prior to any
MAC computation being performed. Because of this, the value that will be used for calculating the first MAC of the first
command after the nonce command is MAC = 1.
There are two commands (Auth and KeyCompute) which can be configured to both verify an input MAC and calculate an
output MAC. When either of these two commands is run in dual authentication mode, MacCount will be incremented twice.
The value of MacCount for a particular MAC calculation is always one greater than that used for the previous MAC calculation.
After 255 MAC calculations, the device will invalidate the internal nonce and commands which require a valid nonce will fail. At
this point, a new nonce command must be run to generate a new nonce.
The MacCount is set to zero if any of the following events occurs:
If there is a CRC error on the incoming command packet, then MacCount will not be incremented. If the device receives any
command that does not involve MAC computation the MacCount will not be incremented.
If a cryptographic commands is received that involves MAC computation, then the MacCount will be incremented regardless of
whether or not there is a subsequent success or failure of the command. The MacCount will also be incremented regardless of
whether or not the particular instance of the command uses the cryptographic engine. If a command fails due to MAC
comparison failure then the nonce is invalidated and the MacCount register is set to zero.
The current value of this register should be known by the system; however, it may also be read out of the device using the Info
command at any time (See Section 7.12).
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•
•
•
The Nonce command is executed
A MAC compare operation fails
The MacCount reaches the maximum count
A reset event occurs: power up (see Section L.3.2), WakeUp from sleep (see Section L.3.3), the reset command
(see Section 7.23), or a security tamper is activated, causing the hardware to reset
Cryptographic Computations
Atmel ATAES132 Preliminary Datasheet
8760A−CRYPTO−5/11
105