ATAES132-TH-EQ Atmel, ATAES132-TH-EQ Datasheet - Page 129

• Manufacturer Part Number: ATAES132-TH-EQ
• Description: EEPROM AES 32Kbit EE SPI
• Manufacturer: Atmel

Specifications of ATAES132-TH-EQ

• Rohs: yes
• Maximum Clock Frequency: 10 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-8
• Interface Type: SPI
• Factory Pack Quantity: 2300

J.5.2.
J.6.
The Auth signaling option is controlled by two bits in the KeyConfig registers – the KeyConfig[KeyID].AuthOut bit and the
KeyConfig[KeyID].AuthOutHold bit (see Table J-2). By default KeyConfig[KeyID].AuthOut bit is 0b for all keys, disabling the
Auth signaling option.
Table J-36. Auth signaling KeyConfig bit functions
If the KeyConfig[AKeyID].AuthOut bit is 1b for the authentication key (AKeyID) then Auth signaling is enabled for that key, the
AuthO signal is output on the SO pin. AuthO is latched high after a successful inbound only authentication, or mutual
authentication using the Auth command (see Section 7.1). AuthO will remain high until the device is powered off unless an
authentication reset is received.
If the KeyConfig[AKeyID].AuthOutHold bit is 0b for the key (AKeyID) used to execute an authentication reset, then the AuthO
signal latch will be latched in the high impedance state when the command is received (with a correct checksum). If
KeyConfig[AKeyID].AuthOutHold bit is 1b then AuthO will be unchanged by execution of an authentication reset sequence.
An authentication reset is an Auth command with mode bits 0 and 1 set to 00b. Knowledge of the key value is not required to
execute an authentication reset (see Section 7.1). The ATAES132 does not memorize the KeyID used to activate Auth
signaling. Each Auth command is processed using the KeyConfig[AKeyID] bits of the AKeyID in the command packet.
Auth signaling is not a security feature. The AuthO signal does not reflect the real-time state of the AuthComplete status flag.
The reset command, the sleep command, and the tamper detectors will not change the state of AuthO. The state of the AuthO
latch is determined only by success or failure of the Auth command and the configuration of the KeyConfig bits. The Info
command should be used to determine the authentication status of the device (see Section 7.12).
The KeyConfig[AKeyID].AuthOut bit and the KeyConfig[AKeyID].AuthOutHold bit are ignored when the ATAES132 is
configured in SPI Interface mode.
Using the AuthO Output
When Auth signaling is enabled, the AuthO signal output is either a logic high or in the high impedance state. AuthO can be
used to drive an LED, or as a control signal to other circuitry. When AuthO is used as a control signal a pull down resistor
should be used to transform the high impedance state into a logic low.
I
The ATAES132 is design to operate on a bus with other I
device capable of operating at clock speeds up to 1MHz (with bus timing scaled accordingly). The ATAES132 is not a fast-
mode or high-speed mode device.
This section lists the I
specification is also listed.
2
C Compatibility
•
•
•
AuthOut Bit
The ATAES132 does not perform client clock stretching
The ATAES132 will not respond to an I
The ATAES132 may be damaged if the clock or data signal levels are above V
ATAES132 cannot be switched off while the bus is active. All of the voltage limits in Section 9.1 must be respected.
1b
0b
X
X
AuthOutHold Bit
2
C options or features which are not supported by the ATAES132. Any feature which differs from the I
1b
0b
X
X
Operation
First successful Auth command forces AuthO high. Additional Auth commands do not
change AuthO, AuthO output remains latched high.
Successful or unsuccessful Auth commands cause no AuthO change
Authentication reset does not change the AuthO output state
Authentication reset forces AuthO to the high impedance state
2
C “general call” command
2
C compatible devices. The ATAES132 is a standard-mode client
Atmel ATAES132 Preliminary Datasheet
CC
. The power supply to the
8760A−CRYPTO−5/11
129
2
C