ATAES132-TH-EQ Atmel, ATAES132-TH-EQ Datasheet - Page 11

• Manufacturer Part Number: ATAES132-TH-EQ
• Description: EEPROM AES 32Kbit EE SPI
• Manufacturer: Atmel

Specifications of ATAES132-TH-EQ

• Rohs: yes
• Maximum Clock Frequency: 10 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-8
• Interface Type: SPI
• Factory Pack Quantity: 2300

2.4.5.
2.4.6.
2.4.7.
IO Address Reset Register
Writing the IO address reset register causes the address pointers in the command memory buffer and the response memory
buffer to be reset to the base address of the buffers. Writing the IO address reset register does not alter the contents of the
response memory buffer, or the value of the STATUS register.
Device Status Register (STATUS)
The device status register is used for handshaking between the host microcontroller and the ATAES132. The host is expected
to read the STATUS register before sending a command or reading a response. Reading the STATUS register does not alter
the contents of the command memory buffer, the response memory buffer, or the value of the STATUS register. See
Appendix G for the definition and behavior of the STATUS register.
Authentication Status Register
The ATAES132 authentication status register stores the result of most recent authentication attempt. The authentication
status register contains the authentication KeyID, the AuthComplete status flag, and the authentication usage restriction bits.
Prior to executing the Auth command, the AuthComplete status flag is set to NoAuth. After successful inbound only or mutual
authentication, the AuthComplete status flag is set to YesAuth.
Atmel ATAES132 Preliminary Datasheet
8760A−CRYPTO−5/11
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