ATAES132-TH-EQ Atmel, ATAES132-TH-EQ Datasheet - Page 126

• Manufacturer Part Number: ATAES132-TH-EQ
• Description: EEPROM AES 32Kbit EE SPI
• Manufacturer: Atmel

Specifications of ATAES132-TH-EQ

• Rohs: yes
• Maximum Clock Frequency: 10 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-8
• Interface Type: SPI
• Factory Pack Quantity: 2300

J.3.4.
J.3.5.
If more than 32 bytes of data are transmitted or the page boundary is crossed, then no data will be written.
If the host transmits an invalid word address the EEPROM will NAK the second address byte and all data bytes.
When any error occurs, the RRDY and EERR bits of the STATUS register are set to 1b to indicate an error. The host can read
the error code from the response memory buffer (address 0xFE00) using the RREAD command. If the command is processed
without error, the EERR bit is set to 0b. Reading the response memory buffer does not reset the error code or the STATUS
register.
Figure J-3.
Current Address Read (READ)
The internal data byte address counter maintains the last address accessed during the last read or write operation,
incremented by one. This address stays valid between operations as long as the device power is maintained.
To perform a current address read, the host sends the device address with the read/write select bit set to one (READ), this
byte is ACKed by the EEPROM. Then the host clocks out the data byte located at the current address. After the byte is
received, the host responds with an I
When any error occurs, the EERR bit of the STATUS register is set to 1b to indicate an error. If the command is processed
without error the EERR bit is set to 0b.
Figure J-4.
SDA LINE
Random Read (RREAD)
A random read requires a “dummy” byte write sequence to load in the data byte address. Once the device address and data
byte address are clocked in and acknowledged by the ATAES132, the host microcontroller must generate another start
condition. The microcontroller then initiates a current address read by sending the device address with the read/write select bit
high (READ). The ATAES132 I
host responds with an I
If the host transmits an invalid word address the EEPROM will NAK the second address byte.
When any error occurs the EERR bit of the STATUS register is set to 1b to indicate an error. If the command is processed
without error the EERR bit is set to 0b.
SDA LINE
S
R
T
A
T
S
T
A
R
T
Page write
Current address read of one data byte
M
M
S
B
S
B
ADDRESS
ADDRESS
DEVICE
DEVICE
2
C NAK and a following STOP condition to terminate the read operation.
S
B
L
L
S
B
W
R
W
T
E
R
W
I
R
E
D
/
A
R
/
2
A
C
K
C
K
A
C ACKs the device address and serially clocks out the data byte. After the byte is received, the
WORDADDRESS (n)
2
C NAK and a following STOP condition to terminate the read operation.
FIRST
t
DATA
C
K
A
O
WORDADDRESS (n)
N
A
C
K
S
O
P
T
SECOND
C
K
A
Atmel ATAES132 Preliminary Datasheet
DATA (n)
A
C
K
DATA (n + x)
8760A−CRYPTO−5/11
A
C
K
S
O
T
P
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