ATAES132-TH-EQ Atmel, ATAES132-TH-EQ Datasheet - Page 33

• Manufacturer Part Number: ATAES132-TH-EQ
• Description: EEPROM AES 32Kbit EE SPI
• Manufacturer: Atmel

Specifications of ATAES132-TH-EQ

• Rohs: yes
• Maximum Clock Frequency: 10 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-8
• Interface Type: SPI
• Factory Pack Quantity: 2300

7.5.
Counter Command
The counter command reads or increments the internal non-reversible monotonic counters. Each counter can increment up to
a value of 2,097,134 using the count command, after which they can be no longer changed. See Appendix H for additional
counter information.
Table 7-27. Counter command options
The CounterConfig[CntID].RequireMAC register bit determines if InMAC is required when incrementing the counter (see
Section 4.4). If CounterConfig[CntID].RequireMAC = 1b, then InMAC is required, so mode bit 1 must be set to 1b when
incrementing the counter. If CounterConfig[CntID].RequireMAC = 0b, then InMAC is prohibited, so mode bit 1 must be set to
0b.
If a MAC is required or generated, then a valid nonce is required to run the counter command. If the
KeyConfig[KeyID].RandomNonce bit is set for the authorizing key, then the nonce must be random.
The AuthCompute command can be used to generate the InMac (see Section 7.3). The AuthCheck command can be used to
validate the OutMac (see Section 7.2).
Table 7-28. Input parameters
Notes:
Opcode
Mode
Param1
Param2
Data
Mode bit 1
1b
0b
1b
0b
1.
The MAC is generated using the key identified by the KeyID in CounterConfig[CountID].IncrID for increment
operations, or the KeyID in CounterConfig[CountID].MacID for counter read operations. The usage counter
included in the MAC when mode bit five is 1b is identified by the CntID stored in KeyConfig[KeyID].CounterNum
for the key used to generate the MAC.
Mode bit 0
Name
Counter
Mode
CountID
Zero
InMac
1b
1b
0b
0b
Description
Read Counter with MAC
Read Counter, no MAC
Increment Counter with MAC
Increment Counter, no MAC
(Bytes)
0 or 16
Size
1
1
2
2
Notes
0x0A
Bit 0: If 1b, then read the counter
Bit 1: If 1b, then InMAC is included in the input packet if bit 0 is 0b, or
Bits 2 to 4: Reserved. Must be 0b.
Bit 5: If 1b, include the usage counter associated with the key
Bit 6: If 1b, include the SerialNum in the MAC
Bit 7: If 1b, include the first four bytes of the SmallZone in the MAC
Upper byte is always 0x00. Upper nibble of lower byte is always 0x0.
Lower nibble of lower byte is the counter to be queried.
Always 0x0000
Integrity MAC for the counter increment operation
If 0b, then Increment the counter
OutMAC is generated if bit 0 is 1b
If 0b, then neither the input nor output packets include a MAC.
generate the MAC
Atmel ATAES132 Preliminary Datasheet
InMAC
Prohibited
Prohibited
Required
Prohibited
8760A−CRYPTO−5/11
OutMAC
Generated
No
No
No
(1)
used to
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