AT45DB642D-CNU Atmel, AT45DB642D-CNU Datasheet - Page 13

IC FLASH 64MBIT 66MHZ 8CASON

AT45DB642D-CNU

Manufacturer Part Number
AT45DB642D-CNU
Description
IC FLASH 64MBIT 66MHZ 8CASON
Manufacturer
Atmel
Datasheet

Specifications of AT45DB642D-CNU

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
64M (8192 pages x 1056 bytes)
Speed
66MHz
Interface
Parallel/Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-CASON
Package
8CASON
Density
64 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
256KByte x 32
Timing Type
Synchronous
Interface Type
Parallel|Serial-SPI
Data Bus Width
8 bit
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
256 KB x 32
Ic Interface Type
Parallel, Serial
Clock Frequency
66MHz
Supply Voltage Range
2.7V To 3.6V
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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8.1
8.1.1
8.1.2
3542K–DFLASH–04/09
Software Sector Protection
Enable Sector Protection Command
Disable Sector Protection Command
Sectors specified for protection in the Sector Protection Register can be protected from program
and erase operations by issuing the Enable Sector Protection command. To enable the sector
protection using the software controlled method, the CS pin must first be asserted as it would be
with any other command. Once the CS pin has been asserted, the appropriate 4-byte command
sequence must be clocked in via the input pins (SI or I/O7-I/O0). After the last bit of the com-
mand sequence has been clocked in, the CS pin must be deasserted after which the sector
protection will be enabled.
Figure 8-1.
To disable the sector protection using the software controlled method, the CS pin must first be
asserted as it would be with any other command. Once the CS pin has been asserted, the
appropriate 4-byte sequence for the Disable Sector Protection command must be clocked in via
the input pins (SI or I/O7-I/O0). After the last bit of the command sequence has been clocked in,
the CS pin must be deasserted after which the sector protection will be disabled. The WP pin
must be in the deasserted state; otherwise, the Disable Sector Protection command will be
ignored.
Figure 8-2.
Command
Enable Sector Protection
Command
Disable Sector Protection
SI or IO
SI or IO
Enable Sector Protection
Disable Sector Protection
7
7
- IO
- IO
CS
CS
0
0
Each transition
represents 8 bits
Each transition
represents 8 bits
Opcode
Opcode
Byte 1
Byte 1
Byte 1
Byte 1
3DH
3DH
Opcode
Opcode
Byte 2
Byte 2
Byte 2
Byte 2
2AH
2AH
Opcode
Opcode
Byte 3
Byte 3
Opcode
Opcode
Byte 4
Byte 4
Byte 3
Byte 3
7FH
7FH
Byte 4
Byte 4
A9H
9AH
13

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