AT45DB642D-CNU Atmel, AT45DB642D-CNU Datasheet - Page 15

• Manufacturer Part Number: AT45DB642D-CNU
• Description: IC FLASH 64MBIT 66MHZ 8CASON
• Manufacturer: Atmel

Specifications of AT45DB642D-CNU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 64M (8192 pages x 1056 bytes)
• Speed: 66MHz
• Interface: Parallel/Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-CASON
• Package: 8CASON
• Density: 64 Mb
• Architecture: Sectored
• Block Organization: Symmetrical
• Typical Operating Supply Voltage: 3.3 V
• Sector Size: 256KByte x 32
• Timing Type: Synchronous
• Interface Type: Parallel|Serial-SPI
• Data Bus Width: 8 bit
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 15 mA
• Mounting Style: SMD/SMT
• Organization: 256 KB x 32
• Ic Interface Type: Parallel, Serial
• Clock Frequency: 66MHz
• Supply Voltage Range: 2.7V To 3.6V
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.1
9.1.1
3542K–DFLASH–04/09
Sector Protection Register
Erase Sector Protection Register Command
The nonvolatile Sector Protection Register specifies which sectors are to be protected or unpro-
tected with either the software or hardware controlled protection methods. The Sector Protection
Register contains 32 bytes of data, of which byte locations 0 through 31 contain values that
specify whether sectors 0 through 31 will be protected or unprotected. The Sector Protection
Register is user modifiable and must first be erased before it can be reprogrammed.
illustrates the format of the Sector Protection Register.:
Table 9-2.
Table 9-3.
Note:
In order to modify and change the values of the Sector Protection Register, it must first be
erased using the Erase Sector Protection Register command.
To erase the Sector Protection Register, the CS pin must first be asserted as it would be with
any other command. Once the CS pin has been asserted, the appropriate 4-byte opcode
sequence must be clocked into the device via the SI or I/O7 - I/O0 pin. The 4-byte opcode
sequence must start with 3DH and be followed by 2AH, 7FH, and CFH. After the last bit of the
opcode sequence has been clocked in, the CS pin must be deasserted to initiate the internally
self-timed erase cycle. The erasing of the Sector Protection Register should take place in a time
of t
powered-down before the completion of the erase cycle, then the contents of the Sector Protec-
tion Register cannot be guaranteed.
The Sector Protection Register can be erased with the sector protection enabled or disabled.
Since the erased state (FFH) of each byte in the Sector Protection Register is used to indicate
that a sector is specified for protection, leaving the sector protection enabled during the erasing
of the register allows the protection scheme to be more effective in the prevention of accidental
programming or erasing of the device. If for some reason an erroneous program or erase com-
mand is sent to the device immediately after erasing the Sector Protection Register and before
Sector Number
Protected
Unprotected
Sectors 0a, 0b Unprotected
Protect Sector 0a
Protect Sector 0b (Page 8-255)
Protect Sectors 0a (Page 0-7), 0b
(Page 8-255)
PE
, during which time the Status Register will indicate that the device is busy. If the device is
1. The default value for bytes 0 through 31 when shipped from Atmel is 00H.
x = don’t care
(1)
Sector Protection Register
Sector 0 (0a, 0b)
(Page 0-7)
Bit 7, 6
0a
00
11
00
11
See
0 (0a, 0b)
Table 9-3
(Page 8-255)
Bit 5, 4
0b
00
00
11
11
Bit 3, 2
xx
xx
xx
xx
Bit 1, 0
1 to 31
xx
xx
xx
xx
FFH
00H
Table 9-3
Value
Data
CxH
0xH
3xH
FxH
15