DK-DEV-1AGX60N Altera, DK-DEV-1AGX60N Datasheet - Page 134

• Manufacturer Part Number: DK-DEV-1AGX60N
• Description: KIT DEV ARRIA GX 1AGX60N
• Manufacturer: Altera
• Series: Arria GXr
• Type: FPGAr

Specifications of DK-DEV-1AGX60N

• Contents: Dev. Board, Quartus® II Web Edition, Reference Designs, Labs, and Complete Documentation
• For Use With/related Products: 1AGX60N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2372

4–12
Table 4–8. PCS Latency
Table 4–9. PCS Latency (Part 1 of 2) (Part 1 of 2)
Arria GX Device Handbook, Volume 1
XAUI
PIPE
GIGE
Serial RapidIO
SDI
BASIC Single
Width
Notes to
(1) The latency numbers are with respect to the PLD-transceiver interface clock cycles.
(2) The total latency number is rounded off in the Sum column.
XAUI
PIPE
GIGE
Serial
RapidIO
SDI
Functional Mode
Table
4–8:
×1, ×4
8-bit channel width
×1, ×4
16-bit channel width
1.25 Gbps, 2.5 Gbps,
3.125 Gbps
HD 10-bit channel width
HD, 3G 20-bit channel
width
×1, ×4, ×8
8-bit channel width
×1, ×4, ×8
16-bit channel width
1.25 Gbps, 2.5 Gbps,
3.125 Gbps
HD10-bit channel width
HD, 3G 20-bit channel width
8-bit/10-bit channel width
16-bit/20-bit channel width
Table 4–8
respectively.
—
—
(Note 1)
Configuration
—
—
and
Table 4–9
2–2.5
2–2.5
2–2.5
4–5
4–5
2.5
5
2–2.5
list the transmitter and receiver PCS latency for each mode,
—
—
—
—
—
—
TX PIPE
—
—
—
—
—
—
—
1
1
5.5–6.5
5.5–6.5
11–13
11–13
—
—
—
Comp FIFO
TX Phase
2–3
3–4
3–4
2–3
2–3
2–3
2–3
2–3
2–3
0.5
0.5
0.5
0.5
Receiver PCS Latency
1
1
1
Transmitter PCS Latency
Serializer
—
—
—
—
—
—
1
Byte
1
1
1
1
1
1
1
1
1
Chapter 4: DC and Switching Characteristics
1
1
1
1
1
1
1
© December 2009 Altera Corporation
Machine
TX State
0.5
—
—
—
—
—
—
—
—
1
1
1
1
1
1
1
1–2
2–3
2–3
1–2
1–2
1–2
1–2
Encoder
8B/10B
0.5
0.5
0.5
0.5
0.5
Operating Conditions
1
1
1
1
—
—
—
—
—
1
1
Sum
4–5
6–7
6–7
4–5
4–5
4–5
4–5
4–5
4–5
14–17
21–25
13–16
19–23
9–10
6–7
6–7
(2)