ATMEGA324PV-10AU Atmel, ATMEGA324PV-10AU Datasheet - Page 20
ATMEGA324PV-10AU
Manufacturer Part Number
ATMEGA324PV-10AU
Description
IC MCU AVR 32K FLASH 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA324PV-10AU
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/JTAG/SPI/USART
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
44TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
10MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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5.3.1
8011O–AVR–07/10
Data Memory Access Times
The 32 general purpose working registers, 64 I/O registers, 160 Extended I/O Registers and the
1024/2048/4096 bytes of internal data SRAM in the ATmega164P/324P/644P are all accessible
through all these addressing modes. The Register File is described in
ter File” on page
Figure 5-2.
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
Figure 5-3.
Address
clk
Data Memory Map for ATmega164P/324P/644P.
On-chip Data SRAM Access Cycles
Data
Data
WR
12.
CPU
RD
(1024/2048/4096 x 8)
160 Ext I/O Reg.
64 I/O Registers
Data Memory
Compute Address
Internal SRAM
32 Registers
T1
Memory Access Instruction
Address valid
ATmega164P/324P/644P
0x0000 - 0x001F
0x04FF/0x08FF/0x10FF
0x0020 - 0x005F
0x0060 - 0x00FF
0x0100
CPU
T2
cycles as described in
Next Instruction
T3
”General Purpose Regis-
Figure
5-3.
20
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