ATMEGA324PV-10AU Atmel, ATMEGA324PV-10AU Datasheet - Page 64

IC MCU AVR 32K FLASH 44-TQFP

ATMEGA324PV-10AU

Manufacturer Part Number
ATMEGA324PV-10AU
Description
IC MCU AVR 32K FLASH 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA324PV-10AU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/JTAG/SPI/USART
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
44TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
10MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA324PV-10AU
Manufacturer:
Atmel
Quantity:
10 000
Company:
Part Number:
ATMEGA324PV-10AU
Quantity:
1 400
Part Number:
ATMEGA324PV-10AUR
Manufacturer:
Atmel
Quantity:
10 000
9.2.1
8011O–AVR–07/10
Moving Interrupts Between Application and Boot Space
When the BOOTRST Fuse is programmed, the Boot section size set to 8 Kbytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses is:
The General Interrupt Control Register controls the placement of the Interrupt Vector table.
0x00004
...
0x00036
;
.org 0x1F000
0x1F000 RESET: ldi
0x1F001
0x1F002
0x1F003
0x1F004
0x1F005
Address Labels Code
;
.org 0x1F000
0x1F000
0x1F002
0x1F004
...
0x1F036
;
0x1F03E RESET: ldi
0x1F03F
0x1F040
0x1F041
0x1F042
0x1FO43
jmp
...
jmp
out
ldi
out
sei
<instr>
jmp
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
EXT_INT1
...
SPM_RDY
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
RESET
EXT_INT0
EXT_INT1
...
SPM_RDY
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
xxx
; IRQ1 Handler
;
; SPM Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
Comments
; Reset handler
; IRQ0 Handler
; IRQ1 Handler
;
; SPM Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
ATmega164P/324P/644P
64

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