ATMEGA324PV-10AU Atmel, ATMEGA324PV-10AU Datasheet - Page 200

IC MCU AVR 32K FLASH 44-TQFP

ATMEGA324PV-10AU

Manufacturer Part Number
ATMEGA324PV-10AU
Description
IC MCU AVR 32K FLASH 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA324PV-10AU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/JTAG/SPI/USART
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
44TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
10MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
ATMEGA324PV-10AU
Manufacturer:
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Quantity:
10 000
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Part Number:
ATMEGA324PV-10AU
Quantity:
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17.5.1
8011O–AVR–07/10
USART MSPIM Initialization
The UDORDn bit in UCSRnC sets the frame format used by the USART in MSPIM mode. The
Receiver and Transmitter use the same setting. Note that changing the setting of any of these
bits will corrupt all ongoing communication for both the Receiver and Transmitter.
16-bit data transfer can be achieved by writing two data bytes to UDRn. A UART transmit com-
plete interrupt will then signal that the 16-bit value has been shifted out.
The USART in MSPIM mode has to be initialized before any communication can take place. The
initialization process normally consists of setting the baud rate, setting master mode of operation
(by setting DDR_XCKn to one), setting frame format and enabling the Transmitter and the
Receiver. Only the transmitter can operate independently. For interrupt driven USART opera-
tion, the Global Interrupt Flag should be cleared (and thus interrupts globally disabled) when
doing the initialization.
Note:
Before doing a re-initialization with changed baud rate, data mode, or frame format, be sure that
there is no ongoing transmissions during the period the registers are changed. The TXCn Flag
can be used to check that the Transmitter has completed all transfers, and the RXCn Flag can
be used to check that there are no unread data in the receive buffer. Note that the TXCn Flag
must be cleared before each transmission (before UDRn is written) if it is used for this purpose.
The following simple USART initialization code examples show one assembly and one C func-
tion that are equal in functionality. The examples assume polling (no interrupts enabled). The
baud rate is given as a function parameter. For the assembly code, the baud rate parameter is
assumed to be stored in the r17:r16 registers.
To ensure immediate initialization of the XCKn output the baud-rate register (UBRRn) must be
zero at the time the transmitter is enabled. Contrary to the normal mode USART operation the
UBRRn must then be written to the desired value after the transmitter is enabled, but before the
first transmission is started. Setting UBRRn to zero before enabling the transmitter is not neces-
sary if the initialization is done immediately after a reset since UBRRn is reset to zero.
ATmega164P/324P/644P
200

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