ATMEGA324PV-10AU Atmel, ATMEGA324PV-10AU Datasheet - Page 281

• Manufacturer Part Number: ATMEGA324PV-10AU
• Description: IC MCU AVR 32K FLASH 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA324PV-10AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire/JTAG/SPI/USART
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 44TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 10 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 10MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.7
8011O–AVR–07/10
Addressing the Flash During Self-Programming
The Z-pointer is used to address the SPM commands. The Z pointer consists of the Z-registers
ZL and ZH in the register file, and RAMPZ in the I/O space. The number of bits actually used is
implementation dependent. Note that the RAMPZ register is only implemented when the pro-
gram space is larger than 64 Kbytes.
Since the Flash is organized in pages (see
be treated as having two different sections. One section, consisting of the least significant bits, is
addressing the words within a page, while the most significant bits are addressing the pages.
This is shown in
addressed independently. Therefore it is of major importance that the Boot Loader software
addresses the same page in both the Page Erase and Page Write operation. Once a program-
ming operation is initiated, the address is latched and the Z-pointer can be used for other
operations.
The (E)LPM instruction use the Z-pointer to store the address. Since this instruction addresses
the Flash byte-by-byte, also bit Z0 of the Z-pointer is used.
Figure 23-3. Addressing the Flash During SPM
Note:
Bit
RAMPZ
ZH (R31)
ZL (R30)
Z - REGISTER
1. The different variables used in
PROGRAM MEMORY
BIT
RAMPZ7
Z15
Z7
PAGE
23
15
PROGRAM
COUNTER
7
15
Figure
PAGE ADDRESS
WITHIN THE FLASH
ZPCMSB
RAMPZ6
PCMSB
Z14
Z6
22
14
23-3. Note that the Page Erase and Page Write operations are
6
PCPAGE
RAMPZ5
Z13
Z5
21
13
5
Figure 23-3
ZPAGEMSB
PAGEMSB
Table 24-7 on page
PCWORD
RAMPZ4
Z12
Z4
20
12
4
WORD ADDRESS
WITHIN A PAGE
(1)
ATmega164P/324P/644P
are listed in
1
0
0
RAMPZ3
INSTRUCTION WORD
Z11
Z3
19
11
3
PAGE
Table 23-9 on page
296), the Program Counter can
RAMPZ2
Z10
Z2
18
10
2
PCWORD[PAGEMSB:0]:
00
01
02
PAGEEND
RAMPZ1
Z9
Z1
17
288.
9
1
RAMPZ0
Z8
Z0
16
8
0
281