AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 164

• Manufacturer Part Number: AT91SAM9RL64-CU
• Description: IC ARM9 MCU 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9RL64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 118
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 118
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22.4
22.4.1
Figure 22-1. SMC Connections to Static Memory Devices
22.5
22.5.1
164
Application Example
Product Dependencies
AT91SAM9R64/RL64 Preliminary
Hardware Interface
I/O Lines
Static Memory
Controller
A1/NWR2/NBS2
NWR1/NBS1
NWR3/NBS3
NWR0/NWE
A2 - A25
A0/NBS0
D0-D31
NCS0
NCS1
NCS2
NCS3
NCS4
NCS5
NCS6
NCS7
The pins used for interfacing the Static Memory Controller may be multiplexed with the PIO
lines. The programmer must first program the PIO controller to assign the Static Memory Con-
troller pins to their peripheral function. If I/O Lines of the SMC are not used by the application,
they can be used for other purposes by the PIO Controller.
A1/NWR2/NBS2
NWR0/NWE
NRD
NRD
D16 - D23
D0 - D7
D0 - D7
CS
OE
WE
D0 - D7
CS
OE
WE
128K x 8
128K x 8
SRAM
SRAM
A0 - A16
A0 - A16
A2 - A18
A2 - A18
NWR1/NBS1
NWR3/NBS3
D24-D31
D8-D15
NRD
NRD
OE
WE
OE
WE
D0-D7
CS
D0-D7
CS
128K x 8
128K x 8
SRAM
SRAM
A0 - A16
A0 - A16
A2 - A18
A2 - A18
6289C–ATARM–28-May-09