AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 865

• Manufacturer Part Number: AT91SAM9RL64-CU
• Description: IC ARM9 MCU 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9RL64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 118
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 118
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

44.8.7
6289C–ATARM–28-May-09
SPI
Table 44-33. SDRAM PC133 Characteristics
Table 44-34. Mobile Characteristics
Notes:
Timings are given assuming a capacitance load on MISO, SPCK and MOSI.
Table 44-35. Capacitance Load for MISO, SPCK and MOSI
Parameter
SDRAM Controller Clock Frequency
Control/Address/Data In Setup
Control/Address/Data In Hold
Data Out Access time after SDCK rising
Data Out change time after SDCK rising
Parameter
SDRAM Controller Clock Frequency
Control/Address/Data In Setup
Control/Address/Data In Hold
Data Out Access time after SDCK rising
Data Out change time after SDCK rising
IO Supply
3.3V
1.8V
1. Control is the set of following signals: SDCKE, SDCS, RAS, CAS, SDA10, BAx, DQMx, and
2. Address is the set of A0-A9, A11-A13.
3. 133 MHz with CL=3, 100 MHz with CL=2.
4. Minimum of 133 MHz and MCK frequency for the operating conditions
SDWE.
40 pF
20 pF
MAX
Corner
(1)(2)
(1)(2)
(1)(2)
(1)(2)
AT91SAM9R64/RL64 Preliminary
40 pF
20 pf
STH
3.3V Supply
1.8V Supply
Min
Min
1.5
0.8
3.0
1.5
2.5
1
3.3V Supply
1.8V Supply
(4)
133/100
(4)
6/8
Max
Max
5.4
133
(Table
(3)
(3)
44-2)
Units
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
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