PXAS37KBA,512 NXP Semiconductors, PXAS37KBA,512 Datasheet - Page 27

IC XA MCU 16BIT 32K OTP 68-PLCC

PXAS37KBA,512

Manufacturer Part Number
PXAS37KBA,512
Description
IC XA MCU 16BIT 32K OTP 68-PLCC
Manufacturer
NXP Semiconductors
Series
XAr
Datasheet

Specifications of PXAS37KBA,512

Core Processor
XA
Core Size
16-Bit
Speed
30MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Processor Series
PXAS3x
Core
80C51
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
I2C, UART
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
50
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-3536-5
935262377512
PXAS37KBA

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Philips Semiconductors
Watchdog Timer
This is a standard XA-G3 watchdog timer. This watchdog timer
always comes up running at reset. The watchdog acts the same on
EPROM, ROM, and ROMless parts, as in the XA-G3.
UARTs
Standard XA-S3 UART0 and UART1 with double buffered transmit
register. A flag has been added to SnSTAT that is set if any of the
status flags (BRn, FEn, or OEn) is set for the corresponding UART
channel. This allows polling for UART errors quickly at the interrupt
service routine. Baud rate sources may be timer 1 or timer 2.
The XA-S3 includes 2 UART ports that are compatible with the
enhanced UART used on the XA-G3.
The UART has separate interrupt vectors for each UART’s transmit
and receive functions. The UART transmitter has been double
buffered, allowing packed transmission of data with no gaps
between bytes and less critical interrupt service routine timing. A
break detect function has been added to the UART. This operates
independently of the UART itself and provides a start-of-break
status bit that the program may test. An Overrun Error flag allows
detection of missed characters in the received data stream. The
double buffered UART transmitter may require some software
changes if code is used that was written for the original XA-G3
single buffered UART.
Each UART baud rate is determined by either a fixed division of the
oscillator (in UART modes 0 and 2) or by the timer 1 or timer 2
overflow rate (in UART modes 1 and 3).
Timer 1 defaults to clock both UART0 and UART1. Timer 2 can be
programmed to clock either UART0 through T2CON (via bits R0CLK
and T0CLK) or UART1 through T2MOD (via bits R1CLK and
T1CLK). In this case, the UART not clocked by T2 could use T1 as
the clock source.
The serial port receive and transmit registers are both accessed at
Special Function Register SnBUF. Writing to SnBUF loads the
2000 Dec 01
XA 16-bit microcontroller
32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I
2
INIT_WATCHDOG:
;
;********************************************************************
;
; Main program goes here, but CALL WATCHDOG periodically.
;
;********************************************************************
;
WATCHDOG:
C, 2 UARTs, 16 MB address range
MOV CCAPM4, #4CH
MOV CCAP4L, #0FFH
MOV CCAP4H, #0FFH
OR CMOD, #40H
CLR EA
MOV CCAP4L, #00
MOV CCAP4H, CH
SETB EA
RET
; Module 4 in compare mode
; Write to low byte first
; Before PCA timer counts up to
; FFFF Hex, these compare values
; must be changed
; Set the WDTE bit to enable the
; Hold off interrupts
; Next compare value is within
; 255 counts of the current PCA
; timer value
; watchdog timer without changing
; the other bits in CMOD
Figure 19. PCA Watchdog Timer Initialization Code
27
transmit register, and reading SnBUF accesses a physically
separate receive register.
The serial port can operate in 4 modes:
Mode 0: Serial I/O expansion mode. Serial data enters and exits
through RxDn. TxDn outputs the shift clock. 8 bits are
transmitted/received (LSB first). (The baud rate is fixed at 1/16 the
oscillator frequency.)
Mode 1: Standard 8-bit UART mode. 10 bits are transmitted
(through TxDn) or received (through RxDn): a start bit (0), 8 data
bits (LSB first), and a stop bit (1). On receive, the stop bit goes into
RB8 in Special Function Register SnCON. The baud rate is variable.
Mode 2: Fixed rate 9-bit UART mode. 11 bits are transmitted
(through TxD) or received (through RxD): start bit (0), 8 data bits
(LSB first), a programmable 9th data bit, and a stop bit (1). On
Transmit, the 9th data bit (TB8_n in SnCON) can be assigned the
value of 0 or 1. Or, for example, the parity bit (P, in the PSW) could
be moved into TB8_n. On receive, the 9th data bit goes into RB8_n
in Special Function Register SnCON, while the stop bit is ignored.
The baud rate is programmable to 1/32 of the oscillator frequency.
Mode 3: Standard 9-bit UART mode. 11 bits are transmitted
(through TxDn) or received (through RxDn): a start bit (0), 8 data
bits (LSB first), a programmable 9th data bit, and a stop bit (1).
In fact, Mode 3 is the same as Mode 2 in all respects except baud
rate. The baud rate in Mode 3 is variable.
In all four modes, transmission is initiated by any instruction that
uses SnBUF as a destination register. Reception is initiated in
Mode 0 by the condition RI_n = 0 and REN_n = 1. Reception is
initiated in the other modes by the incoming start bit if REN_n = 1.
Preliminary specification
XA-S3