EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 120
![IC ARM920T MCU 200MHZ 352-PBGA](/photos/12/23/122390/mfg_ep9312_series_sml.jpg)
EP9312-IBZ
Manufacturer Part Number
EP9312-IBZ
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9312-IBZ
Core Size
16/32-Bit
Package / Case
352-BGA
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Controller Family/series
(ARM9)
A/d Converter
12 Bits
No. Of I/o Pins
65
Clock Frequency
200MHz
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1260
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9312-IBZ
Manufacturer:
CIRRUS
Quantity:
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Company:
Part Number:
EP9312-IBZ
Manufacturer:
HITTITE
Quantity:
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4
4-2
Boot ROM
EP93xx User’s Guide
4.1.2.1 Image Header
4.1.2.2 Boot Algorithm
Note that the code retrieved via UART1 and the SPI Serial Flash is not intended to be a
complete operating system image. It is intended to be a small (up to 2 kbyte) loader that will,
in turn, retrieve a complete operating system image. This small loader can retrieve this
complete image through UART1 or the SPI Serial Flash (just as the Boot ROM did) or it can
be more sophisticated and retrieve it through the IrDA, USB, or Ethernet interfaces.
The Boot ROM code disables the ARM920T’s MMU, so any loader program that is
downloaded sees physical addresses. The loader is free to initialize the page tables and start
the MMU and caches if needed.
The Boot ROM code also does not enable interrupts or timers, so that the system delivered to
the user is in a known safe state and is ready for an operating system or for user code to be
loaded.
For images copied from the SPI Serial Flash or external FLASH, one of the ASCII strings,
“CRUS” or “SURC”, must be present as a HeaderID prefixed to an executable image.
The steps in the software boot process are:
1. Remap memory
2. Turn the green LED off and the red LED on
3. Disable the Watchdog timer
4. Read the Boot State
5. Set up the Clocks to run from external clocks (PLLs are not configured)
6. Based on the Boot State memory width, follow steps A, B, and C.
7. Based on the contents of the SysCfg register, start serial download (see
then follow Steps A, B, C, D, E, and F.
A. Initialize the SYNC Flash and SMC memory interfaces for slow (maximum
B. Initialize the SDRAM interfaces.
C. Perform minimal memory tests
A. Initialize UART1 to 9600 baud, 8 bits, no parity, 1 stop bit
B. Output a “<” character
C. Read 2048 (decimal count) characters from UART1 and store these in the internal
D. Output a “>” to signify 2048 characters have been read
E. Turn on Green LED
F. Jump to the start of the internal Boot Buffer
compatibility) operation
Boot buffer (alias for the Ethernet Mac buffer)
Copyright 2007 Cirrus Logic
Figure
4-1), and
DS785UM1
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