EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 84

• Manufacturer Part Number: EP9312-IBZ
• Description: IC ARM920T MCU 200MHZ 352-PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-IBZ

• Core Size: 16/32-Bit
• Package / Case: 352-BGA
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Controller Family/series: (ARM9)
• A/d Converter: 12 Bits
• No. Of I/o Pins: 65
• Clock Frequency: 200MHz
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1260

3
3-14
31
31
31
31
31
MaverickCrunch Co-Processor
EP93xx User’s Guide
3.4 ARM Co-Processor Instruction Format
cond
cond
cond
cond
cond
The ARM V4T architecture defines five ARM co-processor instructions:
The co-processor instruction assembler notation is found in the ARM programming manuals
or the Quick Reference Card. (For additional information, see Preface,
Documents” on page
instructions are detailed below.
• CDP - Co-processor Data Processing
• LDC - Load Co-processor
• STC - Store Co-processor
• MCR - Move to Co-processor Register from ARM Register
• MRC - Move to ARM Register from Co-processor Register
28 27
28 27
28 27
28 27
28 27
110
110
1110
1110
1110
CDP (Co-Processor Data Processing) Instruction Format
LDC (Load Co-Processor) Instruction Format
STC (Store Co-Processor) Instruction Format
MCR (Move to Co-Processor from ARM Register) Instruction Format
MRC (Move to ARM Register from Co-Processor) Instruction Format
25 24 23 22 21 20 19
25 24 23 22 21 20 19
24 23
24 23
24 23
P
P
U
U
opcode1
opcode1
opcode1
P-3) Formats for the above instructions and variants of these
N
N
21 20 19
21 20 19
W
W
20 19
1
0
0
1
Copyright 2007 Cirrus Logic
CRn
CRn
CRn
Rn
Rn
16 15
16 15
16 15
16 15
16 15
CRd
CRd
CRd
Rd
Rd
12 11
12 11
12 11
12 11
12 11
cp num
cp num
cp num
cp num
cp num
8
8
8
8
8
7
7
7
7
7
opcode2
opcode2
opcode2
“Reference
5
5
5
4
4
4
0
offset
offset
1
1
3
3
3
DS785UM1
CRm
CRm
CRm
0
0
0
0
0