EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 220
![IC ARM920T MCU 200MHZ 352-PBGA](/photos/12/23/122390/mfg_ep9312_series_sml.jpg)
EP9312-IBZ
Manufacturer Part Number
EP9312-IBZ
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9312-IBZ
Core Size
16/32-Bit
Package / Case
352-BGA
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Controller Family/series
(ARM9)
A/d Converter
12 Bits
No. Of I/o Pins
65
Clock Frequency
200MHz
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1260
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9312-IBZ
Manufacturer:
CIRRUS
Quantity:
30
Company:
Part Number:
EP9312-IBZ
Manufacturer:
HITTITE
Quantity:
1 200
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7
Vertical Frame Timing Registers
VLinesTotal
VSyncStrtStop
7-38
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
31
15
31
15
Address: 0x8003_0000
Default: 0x0000_0000
Definition: Total horizontal lines that compose a vertical frame
Bit Descriptions:
Address: 0x8003_0004
Default: 0x0000_0000
Definition: Vertical Sync Pulse Start/Stop register
Bit Descriptions:
30
14
30
14
RSVD
RSVD
RSVD
29
13
29
13
28
12
28
12
RSVD:
TOTAL:
RSVD:
STOP:
27
27
11
11
26
10
26
10
Copyright 2007 Cirrus Logic
25
25
9
9
Reserved - Unknown during read
VLines Total - Read/Write
The VLines Total value written to this field specifies the
total number of horizontal lines for a video frame including
synchronization, blanking, and active lines. This value is
used to preset the Vertical down counter. Please refer to
video the signalling timing diagrams shown in
and
Reserved - Unknown during read
Stop - Read/Write
Figure
24
24
8
8
RSVD
23
23
7-10.
7
7
22
22
6
6
TOTAL
STOP
STRT
21
21
5
5
20
20
4
4
19
19
3
3
18
18
2
2
Figure 7-9
17
17
1
1
DS785UM1
16
16
0
0
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