EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 689

• Manufacturer Part Number: EP9312-IBZ
• Description: IC ARM920T MCU 200MHZ 352-PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-IBZ

• Core Size: 16/32-Bit
• Package / Case: 352-BGA
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Controller Family/series: (ARM9)
• A/d Converter: 12 Bits
• No. Of I/o Pins: 65
• Clock Frequency: 200MHz
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1260

DS785UM1
22.1 Introduction
The AC’97 Controller includes a 5-pin serial interface to an external audio codec. The AC-
Link is a bi-directional, fixed rate, serial PCM (Pulse Code Modulation) digital stream, dividing
each audio frame into 12 outgoing and 12 incoming data streams (slots), each with 20-bit
sample resolution.
The AC’97 Controller contains logic that controls the AC-Link to the audio codec and an
interface to the AMBA APB.
The main features of the AC’97 are:
Table 22-1
The AC’97 pins are multiplexed and may be used for the I
setting DeviceCfg.I2SonAC97.
The AC’97 Controller can support up to four different sampling rates at a time. To allow the
controller to support all slots per frame, it has been assumed that the sampling rate for each
different type of data are the same. For example, all audio data are at the same sampling rate
• Serial-to-parallel conversion on data received from the external codec.
• Parallel-to-serial conversion on data transmitted to the external codec.
• Reception / Transmission of control and status information.
• Supports up to 4 different sampling rates at a time with 4 transmit and 4 receive
Signal Name Input/Output
channels. The transmit and receive paths are buffered with internal FIFO memories
allowing data to be stored independently in both transmit and receive modes. The data
for the FIFOs can be written via either the APB interface or the DMA channels (1-3).
SDATAOUT
SDATAIN
BITCLK
RESET
SYNC
lists the input and output signals for the AC’97 controller.
Output
Output
Output
Input
Input
Table 22-1. AC’97 Input and Output Signals
Serial input data stream from the audio codec. It contains status
information and digital audio input streams.
Clock from serial codec. Fixed at 12.288 MHz.
This serial output transmits the control information and digital audio
output streams to the audio codec.
Synchronization signal to the external codec. Fixed at 48 kHz. It is also
output asynchronously when the audio codec is in warm reset state.
Asynchronous cold reset (active low, resets codec registers).
Copyright 2007 Cirrus Logic
Description
2
S controller instead of AC'97 by
22AC’97 Controller
Chapter 22
22-1
22