DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 102

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.6
Trap instruction exception handling starts when a TRAPA instruction is executed. Trap instruction
exception handling can be executed at all times in the program execution state.
The trap instruction exception handling is as follows:
1. The values in the program counter (PC), condition code register (CCR), and extended register
2. The interrupt mask bit is updated and the T bit is cleared to 0.
3. A vector address corresponding to the interrupt source is generated, the start address is loaded
The TRAPA instruction fetches a start address from a vector table entry corresponding to a vector
number from 0 to 3, as specified in the instruction code.
Table 4.4 shows the status of CCR and EXR after execution of trap instruction exception handling.
Table 4.4
[Legend]
1:
0:
⎯: Retains value prior to execution.
Rev.2.00 May. 28, 2009 Page 62 of 732
REJ09B0059-0200
Interrupt Control Mode
0
2
(EXR) are saved in the stack.
from the vector table to the PC, and program execution starts from that address.
Set to 1
Cleared to 0
Trap Instruction
Status of CCR and EXR after Trap Instruction Exception Handling
I
1
1
CCR
UI
⎯
⎯
I2 to I0
⎯
⎯
EXR
T
⎯
0