D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 1050

• Manufacturer Part Number: D6417760BP200ADV
• Description: IC SUPER H MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D6417760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

26.3.17 DMA Control Register (DMACR)
DMACR sets DMA request signal output. DMAEN enables or disables a DMA request signal.
The DMA request signal is output based on a value that has been set to SET2 to SET0.
Rev. 2.00 Feb. 12, 2010 Page 966 of 1330
REJ09B0554-0200
Bit
7
6 to 3
2
1
0
Bit
Name
DMAEN
⎯
SET2
SET1
SET0
Initial value:
Initial
Value
0
All 0
0
0
0
R/W:
Bit:
DMAEN
R/W
R/W
R
R/W
R/W
R/W
R/W
7
0
6
0
R
-
Description
DMA Enable
0: Disables output of DMA request signal.
1: Enables output of DMA request signal.
Reserved
These bits are always read as 0. The write value should
always be 0.
DMA Request Signal Assert Condition
Sets DMA request signal assert condition.
000: Not output
001: FIFO remained data is 1/4 or less of FIFO capacity.
010: FIFO remained data is 1/2 or less of FIFO capacity.
011: FIFO remained data is 3/4 or less of FIFO capacity.
100: FIFO remained data is 1 byte or more.
101: FIFO remained data is 1/4 or more of FIFO capacity.
110: FIFO remained data is 1/2 or more of FIFO capacity.
111: FIFO remained data is 3/4 or more of FIFO capacity.
R
5
0
-
4
0
-
R
R
3
-
0
SET2
R/W
2
0
SET1
R/W
0
1
R/W
SET0
0
0