AT90PWM81-16SF Atmel, AT90PWM81-16SF Datasheet - Page 154

• Manufacturer Part Number: AT90PWM81-16SF
• Description: IC MCU AVR 8K FLASH ISP 20SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16SF

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (7.5mm Width)
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.5.3
13.6
154
Update of Values
AT90PWM81
Fifty Percent Waveform Configuration
Figure 13-6.
On-Time 0 = (OCRrRAH/L - OCRrSAH/L) * 1/Fclkpsc
On-Time 1 = (OCRrRBH/L - OCRrSBH/L) * 1/Fclkpsc
Dead-Time 0 = (OCRrSAH/L + 1) * 1/Fclkpsc
Dead-Time 1 = (OCRrSBH/L - OCRrRAH/L) * 1/Fclkpsc
Note:
When PSCOUTr0 and PSCOUTr1 have the same characteristics, it’s possible to configure the PSCR in a
Fifty Percent mode. When the PSCR is in this configuration, it duplicates the OCRrSBH/L and OCR-
rRBH/L registers in OCRrSAH/L and OCRrRAH/L registers. So it is not necessary to program
OCRrSAH/L and OCRrRAH/L registers.
The update of PSCR waveform registers are done in the following way:
•
•
•
To avoid asynchronous and incoherent values in a cycle, if an update of one of several values is necessary,
all values are updated at the same time at the end of the cycle by the PSC. The new set of values is calcu-
lated by software and the update is initiated by software.
PSC Counter
PSCOUTn0
PSCOUTn1
Immediately when the PSC is stopped
At the PSC end of cycle when the PSC is running
At the PSC end of cycle following the required condition when LOCK or AUTOLOCK modes are
used.
Minimal value for Dead-Time 0 = 1/Fclkpsc
OCRnSA
0
PSCr0 & PSCr1 Basic Waveforms in One Ramp mode
Dead-Time 0
On-Time 0
PSC Cycle
OCRnRA
OCRnSB
Dead-Time 1
On-Time 1
OCRnRB
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