AT90PWM81-16SF Atmel, AT90PWM81-16SF Datasheet - Page 247
AT90PWM81-16SF
Manufacturer Part Number
AT90PWM81-16SF
Description
IC MCU AVR 8K FLASH ISP 20SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM81-16MN.pdf
(325 pages)
Specifications of AT90PWM81-16SF
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
20-SOIC (7.5mm Width)
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
AT90PWM81-16SF
Manufacturer:
Atmel
Quantity:
2 428
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21. Memory Programming
21.1
7734P–AVR–08/10
Program And Data Memory Lock Bits
For details about these two section, see
“RWW – Read-While-Write Section” on page 234
Table 20-9.
Note:
The AT90PWM81 provides six Lock bits which can be left unprogrammed (“1”) or can be programmed
(“0”) to obtain the additional features listed in
the Chip Erase command.
Table 21-1.
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
BLB12
BLB11
BLB02
BLB01
LB2
LB1
Lock Bit Byte
1. Z15:Z13: always ignored
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See
pointer during Self-Programming.
Explanation of Different Variables used in
Lock Bit Byte
“Addressing the Flash During Self-Programming” on page 239
PC[11:5]
PC[4:0]
11
4
(1)
Corresponding
Bit No
Z-value
7
6
5
4
3
2
1
0
Z12:Z6
Z5:Z1
Z12
Z5
“NRWW – No Read-While-Write Section” on page 234
(1)
Description
–
–
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
Table
Description
Most significant bit in the Program Counter. (The
Program Counter is 12 bits PC[11:0])
Most significant bit which is used to address the words
within one page (32 words in a page requires 5 bits PC
[4:0]).
Bit in Z-register that is mapped to PCMSB. Because Z0 is
not used, the ZPCMSB equals PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB. Because
Z0 is not used, the ZPAGEMSB equals PAGEMSB + 1.
Program counter page address: Page select, for page erase
and page write
Program counter word address: Word select, for filling
temporary buffer (must be zero during page write
operation)
21-2. The Lock bits can only be erased to “1” with
Figure 20-3
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
and the Mapping to the Z-pointer
for details about the use of Z-
AT90PWM81
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