AT90PWM81-16SF Atmel, AT90PWM81-16SF Datasheet - Page 16

IC MCU AVR 8K FLASH ISP 20SOIC

AT90PWM81-16SF

Manufacturer Part Number
AT90PWM81-16SF
Description
IC MCU AVR 8K FLASH ISP 20SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet

Specifications of AT90PWM81-16SF

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
20-SOIC (7.5mm Width)
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM81-16SF
Manufacturer:
Atmel
Quantity:
2 428
4.
4.1
4.2
16
Memories
In-System Reprogrammable Flash Program Memory
SRAM Data Memory
AT90PWM81
This section describes the different memories in the AT90PWM81. The AVR architecture has two main
memory spaces, the Data Memory and the Program Memory space. In addition, the AT90PWM81 fea-
tures an EEPROM Memory for data storage. All three memory spaces are linear and regular.
The AT90PWM81 contains 8K bytes On-chip In-System Reprogrammable Flash memory for program
storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as 4K x 16. For software
security, the Flash Program memory space is divided into two sections, Boot Program section and Appli-
cation Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The AT90PWM81 Program
Counter (PC) is 12 bits wide, thus addressing the 4K program memory locations. The operation of Boot
Program section and associated Boot Lock bits for software protection are described in detail in
Loader Support – Read-While-Write Self-Programming” on page
247
Constant tables can be allocated within the entire program memory address space (see the LPM – Load
Program Memory.
Timing diagrams for instruction fetch and execution are presented in
page
Figure 4-1.
Figure 4-2
contains a detailed description on Flash programming in SPI or Parallel programming mode.
12.
shows how the AT90PWM81 SRAM Memory is organized.
Program Memory Map
Application Flash Section
Boot Flash Section
Program Memory
232.
“Instruction Execution Timing” on
“Memory Programming” on page
0x0000
0x0FFF
7734P–AVR–08/10
“Boot

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