ATTINY24-15SSZ Atmel, ATTINY24-15SSZ Datasheet - Page 40

• Manufacturer Part Number: ATTINY24-15SSZ
• Description: MCU AVR 2K FLASH 15MHZ 14-SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY24-15SSZ

• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 12
• Eeprom Size: 128 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 2KB (2K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Cpu Family: ATtiny
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Interface Type: SPI/UART
• Total Internal Ram Size: 128Byte
• # I/os (max): 12
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 14
• Package Type: SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.3
40
Power-on Reset
Atmel ATtiny24/44/84 [Preliminary]
Figure 9-1.
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection
level is defined in
whenever V
Reset, as well as to detect a failure in supply voltage.
A POR circuit ensures that the device is reset from power-on. Reaching the power-on reset
threshold voltage invokes the delay counter, which determines how long the device is kept in
RESET after V
decreases below the detection level.
Figure 9-2.
INTERNAL
V
TIME-OUT
BODLEVEL [1..0]
CC
RESET
RESET
V
CC
CCRR
Reset Logic
MCU Start-up, RESET Tied to V
is below the detection level. The POR circuit can be used to trigger the Start-up
CC
“System and Reset Characterizations” on page
Pull-up Resistor
rise. The RESET signal is activated again, without any delay, when V
FILTER
SPIKE
V
V
V
RST
PORMA X
PORMIN
t
TOUT
CKSEL[1:0]
Power-on Reset
Reset Circuit
SUT[1:0]
Brown-out
Watchdog
Oscillator
Generator
Circuit
Clock
CK
CC
Register (MCUSR)
MCU Status
DATA BUS
Delay Counters
180. The POR is activated
TIMEOUT
7701D–AVR–09/10
CC