PIC18F2221-I/SS Microchip Technology, PIC18F2221-I/SS Datasheet - Page 309

IC PIC MCU FLASH 2KX16 28SSOP

PIC18F2221-I/SS

Manufacturer Part Number
PIC18F2221-I/SS
Description
IC PIC MCU FLASH 2KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2221-I/SS

Core Size
8-Bit
Program Memory Size
4KB (2K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2221-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
RCALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
© 2009 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
operation
Decode
PC =
PC =
TOS =
Q1
No
Address (HERE)
Address (Jump)
Address (HERE + 2)
Read literal
PUSH PC
operation
Relative Call
RCALL
-1024 ≤ n ≤ 1023
(PC) + 2 → TOS,
(PC) + 2 + 2n → PC
None
Subroutine call with a jump up to 1K
from the current location. First, return
address (PC + 2) is pushed onto the
stack. Then, add the 2’s complement
number ‘2n’ to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is a
two-cycle instruction.
1
2
HERE
to stack
1101
Q2
No
‘n’
PIC18F2221/2321/4221/4321 FAMILY
n
RCALL Jump
1nnn
operation
Process
Data
Q3
No
nnnn
operation
Write to
Q4
PC
No
nnnn
RESET
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
After Instruction
Decode
Registers =
Flags*
Q1
=
Reset
RESET
None
Reset all registers and flags that are
affected by a MCLR Reset.
All
This instruction provides a way to
execute a MCLR Reset in software.
1
1
RESET
Reset
Start
0000
Q2
Reset Value
Reset Value
0000
operation
Q3
No
DS39689F-page 309
1111
operation
Q4
No
1111

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