AT32UC3L064-AUT Atmel, AT32UC3L064-AUT Datasheet - Page 393
![MCU AVR32 64KB FLASH 48TQFP](/photos/6/82/68248/313-48-vqfp_sml.jpg)
AT32UC3L064-AUT
Manufacturer Part Number
AT32UC3L064-AUT
Description
MCU AVR32 64KB FLASH 48TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.AT32UC3L-EK.pdf
(858 pages)
3.AT32UC3L016-D3HT.pdf
(110 pages)
Specifications of AT32UC3L064-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L064-AUT
Manufacturer:
HONGFA
Quantity:
30 000
Part Number:
AT32UC3L064-AUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 393 of 858
- Download datasheet (13Mb)
Figure 19-28. Master Node Configuration, NACT=IGNORE
19.6.7.2
32099F–11/2010
TXRDY
RXRDY
LINTC
LINIR
Write
Slave Node Configuration
Break
Header
IMPORTANT: if the NACT configuration for this frame is PUBLISH, the US_LINMR register,
must be write with NACT=PUBLISH even if this field is already correctly configured, that in order
to set the TXREADY flag and the corresponding Peripheral DMA Controller write transfer
request.
What comes next depends on the NACT configuration:
Synch
• Write TXEN and RXEN in CR to enable both the transmitter and the receiver.
• Write MODE in MR to select the LIN mode and the Slave Node configuration.
• Write CD and FP in BRGR to configure the baud rate.
• Wait until LINID in CSR rises
• Check LINISFE and LINPE errors
• Read IDCHR in RHR
• Write NACT, PARDIS, CHKDIS, CHKTYPE, DLCM and DLC in LINMR to configure the frame
• Case 1: NACT = PUBLISH, the USART sends the response
• Case 2: NACT = SUBSCRIBE, the USART receives the response
transfer.
– Wait until TXRDY in CSR rises
– Write TCHR in THR to send a byte
– If all the data have not been written, redo the two previous steps
– Wait until LINTC in CSR rises
– Check the LIN errors
– Wait until RXRDY in CSR rises
– Read RCHR in RHR
– If all the data have not been read, redo the two previous steps
– Wait until LINTC in CSR rises
– Check the LIN errors
Protected
Identifier
Data3
Response
space
Frame slot = TFrame_Maximum
Frame
Data 1
Response
Data N-1
AT32UC3L016/32/64
Data N
Checksum
FSDIS=1
space
frame
Inter-
FSDIS=0
393
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