AT32UC3L064-AUT Atmel, AT32UC3L064-AUT Datasheet - Page 75

• Manufacturer Part Number: AT32UC3L064-AUT
• Description: MCU AVR32 64KB FLASH 48TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3L064-AUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TQFP, 48-VQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: SPI/TWI/USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 7
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL
• Development Tools By Supplier: AT32UC3L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9-ch x 10-bit
• Package: 48TQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.8
32099F–11/2010
Module Configuration
The specific configuration for each PDCA instance is listed in the following tables.The module
bus clocks listed here are connected to the system bus clocks. Please refer to the Power Man-
ager chapter for details.
Table 7-6.
Table 7-7.
Table 7-8.
The table below defines the valid Peripheral Identifiers (PIDs). The direction is specified as
observed from the memory, so RX means transfers from peripheral to memory and TX means
from memory to peripheral.
Table 7-9.
Feature
Number of channels
Number of performance monitors
Module name
PDCA
Register
PSR CH 0
PSR CH 1
PSR CH 2
PSR CH 3
PSR CH 4
PSR CH 5
PSR CH 6
PSR CH 7
PSR CH 8
PSR CH 9
PSR CH 10
PSR CH 11
VERSION
PID
0
1
2
3
Direction
RX
RX
RX
RX
PDCA Configuration
Module Clock Name
Register Reset Values
Peripheral Identity Values
Clock Name
CLK_PDCA_HSB
CLK_PDCA_PB
Reset Value
0
1
2
3
4
5
6
7
8
9
10
11
122
Peripheral Instance
USART0
USART1
USART2
USART3
PDCA
12
1
Description
Clock for the PDCA HSB interface
Clock for the PDCA PB interface
Peripheral Register
RHR
RHR
RHR
RHR
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