DSPIC30F2020-30I/MM Microchip Technology, DSPIC30F2020-30I/MM Datasheet - Page 175

• Manufacturer Part Number: DSPIC30F2020-30I/MM
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2020-30I/MM

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-QFN
• Core Frequency: 15MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN-S EP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 16-2:
© 2006 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
C = Clear in software
bit 15-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
P5RDY: Conversion Data for Pair #5 Ready bit
Bit set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P4RDY: Conversion Data for Pair #4 Ready bit
Bit set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P3RDY: Conversion Data for Pair #3 Ready bit
Bit set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P2RDY: Conversion Data for Pair #2 Ready bit
Bit set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P1RDY: Conversion Data for Pair #1 Ready bit
Bit set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
P0RDY: Conversion Data for Pair #0 Ready bit
Bit set when data is ready in buffer, cleared when a ‘0’ is written to this bit.
U-0
U-0
—
—
A/D STATUS REGISTER (ADSTAT)
W = Writable bit
‘1’ = Bit is set
H-S = Set by hardware
P5RDY
R/C-0
H-S
U-0
—
P4RDY
R/C-0
H-S
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
P3RDY
R/C-0
H-S
U-0
—
dsPIC30F1010/202X
P2RDY
R/C-0
H-S
U-0
—
x = Bit is unknown
P1RDY
R/C-0
H-S
U-0
—
DS70178C-page 173
P0RDY
R/C-0
U-0
H-S
—
bit 8
bit 0