ATMEGA64A-AU Atmel, ATMEGA64A-AU Datasheet - Page 27
![MCU AVR 64K ISP FLASH 64-TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA64A-AU
Manufacturer Part Number
ATMEGA64A-AU
Description
MCU AVR 64K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA64A-MUR.pdf
(21 pages)
2.ATMEGA64A-AU.pdf
(392 pages)
3.ATMEGA64A-AU.pdf
(3 pages)
Specifications of ATMEGA64A-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA64A-AU
Manufacturer:
ATMEL
Quantity:
4 500
Company:
Part Number:
ATMEGA64A-AU
Manufacturer:
Atmel
Quantity:
900
Company:
Part Number:
ATMEGA64A-AU
Manufacturer:
ATMEL85
Quantity:
900
Part Number:
ATMEGA64A-AU
Manufacturer:
AT
Quantity:
20 000
7.5.7
8160C–AVR–07/09
Using all Locations of External Memory Smaller than 64 KB
Figure 7-8.
Note:
Figure 7-9.
Note:
Since the external memory is mapped after the internal memory as shown in
23, the external memory is not addressed when addressing the first 4,352 bytes of data space. It
may appear that the first 4,352 bytes of the external memory are inaccessible (external memory
addresses 0x0000 to 0x10FF). However, when connecting an external memory smaller than 64
KB, for example 32 KB, these locations are easily accessed simply by addressing from address
0x8000 to 0x90FF. Since the External Memory Address bit A15 is not connected to the external
memory, addresses 0x8000 to 0x90FF will appear as addresses 0x0000 to 0x10FF for the exter-
nal memory. Addressing above address 0x90FF is not recommended, since this will address an
external memory location that is already accessed by another (lower) address. To the Applica-
tion software, the external 32 KB memory will appear as one linear 32 KB address space from
System Clock (CLK
System Clock (CLK
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper sector) or
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper sector) or
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 1)
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 1)
SRW00 (lower sector).
The ALE pulse in period T6 is only present if the next instruction accesses the RAM (internal
or external).
SRW00 (lower sector).
The ALE pulse in period T7 is only present if the next instruction accesses the RAM (internal
or external).
External Data Memory Cycles with SRWn1 = 1 and SRWn0 = 0
External Data Memory Cycles with SRWn1 = 1 and SRWn0 = 1
DA7:0
A15:8
DA7:0
A15:8
CPU
ALE
WR
CPU
RD
ALE
WR
RD
)
)
Prev. Addr.
Prev. Data
Prev. Data
Prev. Data
Prev. Addr.
Prev. Data
Prev. Data
Prev. Data
T1
T1
Address
Address
Address
Address
Address
T2
Address
T2
XX
XX
Data
Address
T3
Data
Data
Address
T3
Data
Data
Data
T4
T4
T5
T5
T6
ATmega64A
Figure 7-4 on page
(1)
(1)
T6
T7
27