ATMEGA64A-AU Atmel, ATMEGA64A-AU Datasheet - Page 92

MCU AVR 64K ISP FLASH 64-TQFP

ATMEGA64A-AU

Manufacturer Part Number
ATMEGA64A-AU
Description
MCU AVR 64K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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14. 8-bit Timer/Counter0 with PWM and Asynchronous Operation
14.1
14.2
8160C–AVR–07/09
Features
Overview
Timer/Counter0 is a general purpose, single-channel, 8-bit Timer/Counter module. A simplified
block diagram of the 8-bit Timer/Counter is shown in
I/O pins, refer to
and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed in
the
Figure 14-1. 8-bit Timer/Counter Block Diagram.
Registers
Single Channel Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV0 and OCF0)
Allows Clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
“Register Description” on page
Status Flags
“Pin Configuration” on page
Timer/Counter
TCNTn
OCRn
=
ASSRn
direction
count
clear
BOTTOM
Synchronized Status Flags
106.
= 0
Control Logic
=
TCCRn
TOP
Asynchronous Mode
0xFF
Select (ASn)
2. CPU accessible I/O Registers, including I/O bits
clk
Tn
Synchronization Unit
Figure
OCn
(Int. Req.)
Generation
Prescaler
Waveform
14-1. For the actual placement of
ATmega64A
Oscillator
T/C
clk
TOVn
(Int. Req.)
clk
clk
OCn
ASY
I/O
I/O
TOSC2
TOSC1
92

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