ATMEGA64A-AU Atmel, ATMEGA64A-AU Datasheet - Page 90

MCU AVR 64K ISP FLASH 64-TQFP

ATMEGA64A-AU

Manufacturer Part Number
ATMEGA64A-AU
Description
MCU AVR 64K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA64A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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13.4.10
13.4.11
13.4.12
13.4.13
13.4.14
13.4.15
13.4.16
13.4.17
8160C–AVR–07/09
PORTD – Port D Data Register
DDRD – Port D Data Direction Register
PIND – Port D Input Pins Address
PORTE – Port E Data Register
DDRE – Port E Data Direction Register
PINE – Port E Input Pins Address
PORTF – Port F Data Register
DDRF – Port F Data Direction Register
the DDRC and PINC registers are available in ATmega103 compatibility mode, and should not
be used for 100% backward compatibility.
Bit
0x12 (0x32)
Read/Write
Initial Value
Bit
0x11 (0x31)
Read/Write
Initial Value
Bit
0x10 (0x30)
Read/Write
Initial Value
Bit
0x03 (0x23)
Read/Write
Initial Value
Bit
0x02 (0x22)
Read/Write
Initial Value
Bit
0x01 (0x21)
Read/Write
Initial Value
Bit
(0x62)
Read/Write
Initial Value
Bit
(0x61)
Read/Write
Initial Value
PORTD7
PORTE7
PORTF7
PIND7
PINE7
DDD7
DDE7
DDF7
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
R
7
0
7
0
7
7
0
7
0
7
7
0
7
0
PORTD6
PORTE6
PORTF6
PIND6
PINE6
DDD6
DDE6
DDF6
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
R
0
0
0
0
6
0
6
6
6
6
6
0
6
6
PORTD5
PORTE5
PORTF5
PIND5
PINE5
DDD5
DDE5
DDF5
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
R
5
0
5
0
5
5
0
5
0
5
5
0
5
0
PORTD4
PORTE4
PORTF4
PIND4
PINE4
DDD4
DDF4
DDE4
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
R
0
4
0
4
0
4
4
0
4
0
4
4
0
4
PORTD3
PORTE3
PORTF3
PIND3
PINE3
DDD3
DDE3
DDF3
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
R
3
0
3
0
3
0
3
3
0
3
0
3
3
0
PORTD2
PORTE2
PORTF2
PIND2
PINE2
DDD2
DDE2
DDF2
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
R
2
0
2
0
2
2
0
2
2
0
2
0
2
0
PORTD1
PORTE1
PORTF1
PIND1
PINE1
DDD1
DDF1
DDE1
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
R
1
0
1
0
1
0
1
1
0
1
1
0
1
0
ATmega64A
PORTD0
PORTE0
PORTF0
PIND0
PINE0
DDD0
DDF0
DDE0
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PORTD
PORTE
PORTF
DDRF
DDRD
DDRE
PIND
PINF
90

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